W89C841F Datasheet, PDF (17/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER

W89C841F/D
BootROM/Flash and EEPROM Interface, continued
SIGNAL NAME
BtAdd[3]/
COL_MAC/
COL_PHY
BtAdd[2]/
CRS_MAC/
CRS_PHY
BtAdd[1]/
MDIO_MAC/
MDIO_PHY
BtAdd[0]/
MDC_MAC/
MDC_PHY
BtData[7:5]/
ModeSel[2:0]
PIN TYP.
I/O/
I/
O
I/O/
I/
O
I/O
I/O/
O/
I
I/O
PIN NO.
55
54
53
52
100 − 102
PIN DESCRIPTION
BootROM Address (Normal Mode)
This pin is used as ROM address pin.
MII Collision (MAC mode)
This pin is used to input MII COL signal.
MII Collision (PHYceiver mode)
This pin is used to output MII COL signal.
BootROM Address (Normal Mode)
This pin is used as ROM address pin.
MII Carrier Sense (MAC mode)
This pin is used to input MII CRS signal.
MII Carrier Sense (PHYceiver mode)
This pin is used to output MII CRS signal.
BootROM Address (Normal Mode)
This pin is used as ROM address pin.
MII Management Data (MAC mode)
This pin is used to input/output MII MDIO signal.
MII Management Data (PHYceiver mode)
This pin is used to input/output MII MDIO signal.
BootROM Address (Normal Mode)
These pins are used as ROM address pin.
MII Management Clock (MAC mode)
This pin is used to output MII MDC signal.
MII Management Clock (PHYceiver mode)
This pin is used to input MII MDC signal.
BootROM Data[7:5]
These pins are used as ROM data pins.
Mode Selection
When power-on, these pins are used as input pins to
latch the setting value of ModeSel.
Mode
CONFIG ModeSel
Normal
00
000
MAC Controller 01
011
PHYceiver
10
000
Testing
11
xxx
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Publication Release Date: October 18, 2001
Revision A3