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W89C841F Datasheet, PDF (34/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER
W89C841F/D
6) Burst access to the configuration registers will be terminated after 1st data transfer completed with a
disconnect without data.
The following table outlined all the PCI configuration registers inside this chip and summarized its
function.
Configuration Register Mapping
CODE
F00
F04
F08
F0c
F10
F14
F18
----
F28
F2c
F30
F34
----
F3c
F40
Fdc
Fe0
Fe4
Fe8
ABBREVIATION
FID
FCS
FREV
FLT
FBIOAC
FBIOAD
FBMA
-----
FCISPR
FSSID
FERBA
FCAPR
-----
FIR
FSR
FPMR0
FPMR1
FVPDR0
FVPDR1
MEANING
Identification
Command and status
Revision
Latency timer
Base I/O address for Cxx registers
Base I/O address for Dxx registers
Base memory address
Reserved
CardBus CIS pointer
Subsystem ID
Expansion ROM base address
Capabilities pointer
Reserved
Interrupt
Signature
Power Management Register 0
Power management Register 1
Vital Product Data Register 0
Vital Product Data Register 1
SYSTEM I/O OFFSET
00h
04h
08h
0ch
10h
14h
18h
1ch − 24h
28h
2Ch
30h
34h
38h
3Ch
40h
DCh
E0h
E4h
E8h
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