W89C841F Datasheet, PDF (31/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER

W89C841F/D
ROM SIZE
None
None
8 Kbytes
16Kbytes
32Kbytes
64Kbytes
128Kbytes
256Kbytes
DC0/DBRAR[30:28]
000b
001b
010b
011b
100b
101b
110b
111b
F30/FERBA
0000_0000h
0000_0000h
FFFF_E001h
FFFF_C001h
FFFF_8001h
FFFF_0001h
FFFE_0001h
FFFC_0001h
The address decoder of W89C841F for accessing the on-board BootROM will be enabled if both the
bit 0 of F30/FERBA and the bit 1 of F04/FCS are set to high at the same time. On-board Boot ROM
data will be fetched by W89C841F and are loaded into the host memory. On the other hand, the
address decoder will be disabled if the bit 0 of F30/FERBA is reset to 0. Under this case, W89C841F
will ignore the Dc0/DBRAR, no matter what content it has.
Usually on-board BootROM data can be read by the system BIOS during host system booting or
power-on reset. W89C841F also provides an access method by register Dc0/DBRAR and
Dc0/DEEAR[31] to read or write Flash memory on Restore Card applications. If BootROM interface is
chosen to be accessed, the bit EESEL of register Dc4/DEEAR[31] must be set to 0 at first. The read
and write process for BootROM or Flash through register Dc0/DBRAR is listed in the following table.
COMMAND
Read
Write
STEP
1) Set BootROM access bit EESEL (Dc4/DEEAR[31]) to 0.
2) Set the BootROM/Flash offset address to bits BROMA
3) Set BootROM/Flash read control bit BROMRD to 1.
4) Waiting for read operation completed until bit BROMRD change to 0.
5) Read back the data from bits BROMD
1) Set BootROM access bit EESEL (Dc4/DEEAR[31]) to 0.
2) Set the Boot ROM offset address to bits BROMA
3) Write data to bits BROMD
4) Set BootROM write control bit BROMWR to 1.
5) Waiting for write operation completed until bit BROMWR change to 0.
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Publication Release Date: October 18, 2001
Revision A3