W89C841F Datasheet, PDF (64/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER

W89C841F/D
This table lists the initial state of each register in W89C841F after Stk_ResetB, PCI_ResetB,
D3toD0_ResetB and software reset.
CODE
ABBR.
D00
D04 − D08
D0C
D10
D14
D18 − D1c
D20
D24
D28
D2C
D30
D34
D38
D3C
D40
D44
D48
D4c
D50
D54
D58
D5c
D60
D64
D68
D6c
D70 − Dbc
Dc0
Dc4
Dc8
Dcc
DWUPC
Reserved
DWF0CRC
DWF1CRC
DWF2CRC
Reserved
DBWF0BM0
DBWF0BM1
DBWF0BM2
DBWF0BM3
DBWF1BM0
DBWF1BM1
DBWF1BM2
DBWF1BM3
DBWF2BM0
DBWF2BM1
DBWF2BM2
DBWF2BM3
DBWF3BM0
DBWF3BM1
DBWF3BM2
DBWF3BM3
DBWF4BM0
DBWF4BM1
DBWF4BM2
DBWF4BM3
Reserved
DBRAR
DEEAR
DMMAR
DPA0
STK_RESETB, PCI_RESETB,
D3TOD0_RESETB
0000_0458h
FFFE_FFFEh
FFFE_FFFEh
FFFE_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
4020_0000h
0000_0000h
SOFTWARE RESET
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
Non affected
0000_0000h
0000_0000h
4020_0000h
Non affected
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