W89C841F Datasheet, PDF (13/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER

W89C841F/D
PCI Interface, continued
SIGNAL NAME PIN TYP.
SERRB
O/OD
INTAB
O/OD
PIN NO.
26
115
DESCRIPTION
System Error
This pin is asserted with one PCI clock width within
two PCI clocks after an address parity error is
detected, and keeps in high impedance state when
idle. The interrupt function caused by this event is
gated by the bits in F04/FCS register.
W89C841F will assert SERRB and will set a high to
the Detect Parity Error bit F04/FCS[31] and the Signal
System Erro bit F04/FCS[30] if an address parity
error is detected and SERRB enable bit F04/FCS[8]
is previously set to 1.
The Bus Error Status bit C14/CISR[13] will be set to
high if both an address parity error is detected and
the parity error response bit F04/FCS[6] is set to high.
Interrupt A
INTAB is asserted when any one of unmasked
interrupt bits in C14/CISR is set. It keeps asserted
until all of the unmasked interrupt bits is cleared.
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Publication Release Date: October 18, 2001
Revision A3