W89C841F Datasheet, PDF (66/102 Pages) Winbond – 3-IN - 1 10/100M FAST ETHERNET CONTROLLER

W89C841F/D
D00/DWUPCS Wake-up Control and Status Register, continued
BIT ATTRIBUTE BIT NAME
DESCRIPTION
17
R/WC
RWUPF1 Received Wake-up Frame 1
When set, indicates that a Wake-up Frame 0 has been
received if Wake-up Frame detector is enabled (WUPFE =
1).
16
R/WC
RWUPF0 Received Wake-up Frame 0
When set, indicates that a Wake-up Frame 0 has been
received if Wake-up Frame detector is enabled (WUPFE =
1).
15:14
R
13
R/W
12
R
---
PWRDN
EETYPE
Reserved. Fixed at 0.
PHY Power Down Enable
If Bus Type is CardBus which is loaded from EEPROM, bit
PWRDN is default to high (active) to force PHY into power
down mode after power on reset. If Bus Type is not
CardBus, bit PWRDN is default to low to disable power
down mode after power on reset.
1: PHY power down enable
0: PHY power down disable
EEPROM Type
After power on reset, EEPROM type will be latched in from
pin BtWEB/EESel.
1: 93C56
0: 93C46
11
R/W
CLKRUN_En CLOCKRUN Enable
This bit is loaded from EEPROM to control pin CLKRUNB
in MiniPCI or CardBus system.
1: Enable ClockRun function.
0: Disable ClockRun function.
10
R/W
MGPE
Magic Packet Detector Enable
Loaded from EEPROM.
Setting to 1 and PMEN bit is true enable the operation of
Magic Packet Detector.
9
R/W
LSCDE_L2F Link Status Change From Link to Fail Detector Enable
Setting to 1 and PMEN bit is true enable the operation of
Link Status Change From Link to Fail Detector.
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