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| TLK105_16 Datasheet, PDF (92/104 Pages) Texas Instruments – TLK105 TLK106 Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer | |||
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TLK105
TLK106
SLLSEB8C â AUGUST 2012 â REVISED APRIL 2016
www.ti.com
9.10.21 100Mbs Loopback Timing
Table 9-21. 100Mbs Loopback Timing
PARAMETER
t1
TX_EN to RX_DV Loopback
TEST CONDITIONS
100Mbs external loopback
100Mbs external loopback â fast RX_DV mode
100Mbs analog loopback
100Mbs PCS Input loop back
100Mbs MII loop back
MIN TYP MAX UNIT
241 242 243
201 202 203
232 233 234 ns
120 121 122
8
9
10
TX_CLK
TX_EN
TXD[3:0]
CRS
t1
RX_CLK
RX_DV
RXD[3:0]
T0361-01
(1) Due to the nature of the descrambler function, all 100Base-TX Loopback modes cause an initial dead-time of up to 550 μs during
which time no data is present at the receive MII outputs. The 100Base-TX timing specified is based on device delays after the initial
550µs dead-time.
(2) Measurement is made from the first rising edge of TX_CLK after assertion of TX_EN.
(3) External loopback was measured using very short external cable (approximately 10cm).
(4) Since MII loopback introduce extreme short roundtrip delay, some hosts would use PCS Input loopback (Mainly in 100BT).
Figure 9-21. 100Mbs Loopback Timing
92
Electrical Specifications
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