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TLK105_16 Datasheet, PDF (62/104 Pages) Texas Instruments – TLK105 TLK106 Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer
TLK105
TLK106
SLLSEB8C – AUGUST 2012 – REVISED APRIL 2016
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8.1.19 Receiver Error Counter Register (RECR)
This counter provides information required to implement the "Symbol Error During Carrier" attribute within
the PHY managed object class of Clause 30 of the IEEE 802.3u specification.
Table 8-23. Receiver Error Counter Register (RECR), address 0x0015
BIT
BIT NAME
15:0 RX Error Count
DEFAULT
DESCRIPTION
0, RO, / COR RX_ER Counter:
When a valid carrier is present (only while RXDV is set), and there is at least one occurrence of
an invalid data symbol, this 16-bit counter increments for each receive error detected. The
RX_ER counter does not count in MII loopback mode. The counter stops when it reaches its
maximum count of FFFFh. When the counter exceeds half-full (7FFFh), an interrupt is
generated. This register is cleared on read.
62
Register Block
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