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| TLK105_16 Datasheet, PDF (84/104 Pages) Texas Instruments – TLK105 TLK106 Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer | |||
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TLK105
TLK106
SLLSEB8C â AUGUST 2012 â REVISED APRIL 2016
www.ti.com
9.10.7 100Base-TX Transmit Packet Deassertion Timing
Table 9-7. 100Base-TX Transmit Packet Deassertion Timing
PARAMETER
TEST CONDITIONS
t1
TX_CLK to PMD Output Pair deassertion
100Mbs Normal mode
MIN TYP
4.6
MAX UNIT
bits
TX_CLK
TX_EN
TXD
t1
PMD Output Pair
DATA
DATA
(T/R)
(T/R)
IDLE
IDLE
T0344-01
Figure 9-7. 100Base-TX Transmit Packet Deassertion Timing
84
Electrical Specifications
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