TLK105_16 Datasheet, PDF (21/104 Pages) Texas Instruments – TLK105 TLK106 Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer

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TLK105
TLK106
SLLSEB8C – AUGUST 2012 – REVISED APRIL 2016
Table 4-1. Typical MDIO Frame Format (continued)
MII MANAGEMENT SERIAL PROTOCOL
Write Operation
<IDLE><START><OP CODE><DEVICE ADDR><REG
ADDR><TURNAROUND><DATA><IDLE>
<idle><01><01><AAAAA><RRRRR><10><xxxx xxxx xxxx xxxx><idle>
MDC
MDIO ^Z
Z
(STA)
MDIO
Z
Z
(PHY)
Z 0 1 1 0 0 1 1 0 0 0 0 0 0 0Z0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0 Z
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 4-3. Typical MDC/MDIO Read Operation
MDC
MDIO ^Z
Z
(STA)
Z 0 1 0 1 0 1 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0Z
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 4-4. Typical MDC/MDIO Write Operation
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