TLK3114SA_13 Datasheet, PDF (9/66 Pages) Texas Instruments – 10-Gbps XAUI Transceiver

Line Card
4
4
TLK3114SA
or
TLK3104SA
4
4
TCA..D
TDA..D[9:0] _TX+
TX−
MAC/
Packet _XGMII
Processor
TLK3114SA
PCS
4
4
XAUI
RCA..D
RDA..D[9:0] ^{RX+ 4}
RX−
4
CWDM
Optics
Figure 1−2. System Block Diagram (PCS Implementation)
Figure 1−3 shows an example system block diagram for the TLK3114SA device used to provide the system
backplane interconnect.
Line Card
RCA..D
4
4
XAUI
RX+ ^RDA..D[9:0]
RX−
TLK3114SA
XGMII
MAC/
Packet
Processor
TCA..D
4
TX+ TDA..D[9:0]
4 ^TX−
Framer/
PCS
PHY/
Optics
System
Backplane
RCA..D
4
4
XAUI
RX+ ^RDA..D[9:0]
RX−
TLK3114SA _XGMII
TCA..D
4
TX+ TDA..D[9:0]
4 ^TX−
Switch Fabric
Figure 1−3. System Block Diagram (Backplane Interconnect Implementation)
The TLK3114SA device supports the IEEE 802.3 defined management data input/output (MDIO) interface to allow
ease in configuration and status monitoring of the link.
The TLK3114SA device supports the IEEE 1149.1 defined JTAG test port for ease in board manufacturing test. It also
supports a comprehensive series of built-in tests for self-test purposes including internal serial loopback and
pseudorandom bit stream (PRBS) generation and verification.
1−2