TLK3114SA_13 Datasheet, PDF (12/66 Pages) Texas Instruments – 10-Gbps XAUI Transceiver

LPENx
PRBSEN
CODE
TCx
TDx[9:0] Tx FIFO
PRBS
Generator ¹⁰
TDx[7:0]
KGENx
8-B/10-B
Encoder
10
10
MUX
TDx[9:0]
MUX ¹⁰ _{Parallel to}
Serial
Baud Clock
D
Q
RFCN
RFCP
RCx
Multiplying Clock
Synthesizer
Baud Clock
RCA
PSYNC
RDx[7:0]
RDx[9:0] MUX ^KFLAGx
MUX
CTC
8-B/10-B
Decoder-
PRBS
10
Verification
10
Interpolator and
Clock Recovery
Recovered
Clock
Serial to
10
Parallel and
Comma Detect
MUX
CODE
SYNCEN
1.1 Features
Figure 1−5. Block Diagram of Individual Channel
• Quad 3.125 Gbps per channel transceiver providing 10-Gbps data throughput
• P802.3ae 10-Gbps Ethernet XGXS compliant including:
− XGMII parallel interface to MAC and XAUI serial interfaces
− Clock tolerance compensation with column add/drop
− XAUI interpacket gap /A/, /K/, and /R/ code generation and stripping
− Remote and local fault reporting on the XGMII as defined
• MDIO interface
• Selectable synchronized or independent channel operation
• Selectable transmit-only, receiver-only, transceiver, and repeater functions
• Selectable on-chip 8-b/10-b ENDEC
• On-chip receive equalization
• Receiver differential input thresholds 200 mV_P-P
• On-chip 100-Ω differential receiver termination
TXxP
TXxN
Mode
Selector
CONFIG0
CONFIG1
RXxP
RXxN
1−5