TLK3114SA_13 Datasheet, PDF (28/66 Pages) Texas Instruments – 10-Gbps XAUI Transceiver

XAUI
RXA ... D D D D A
RXB ... D D D T A
RXC ... D D D K A
RXD ... D D D K A
Running Disparity Error
Detected by /A/ Yields
Running Disparity Error
Detected by /T/ Yields
Running Disparity Error
Detected by /K/ Yields
Running Disparity Error
Detected by /K/ Yields
XGMII
... D D D E I
... D D E T I
... D D E I I
... D D E I I
D = Data
T = K29.7
A = K28.3
K = K28.5
E = Error (0xFE)
I = Idle
Figure 3−8. End-of-Packet Error Detection
3.15 Fault Detection and Reporting
The TLK3114SA device detects and reports local faults as well as forwards both local and remote faults as defined
in the IEEE P802.3ae to aid in fault diagnosis. All faults detected by the TLK3114SA device, such as LOS detect, are
reported as local faults to the upper layer protocols, as shown in Table 3−7. Once a local fault is detected in the
TLK3114SA device, bit 7 in MDIO registers 4.1 and 5.1 is set. Fault sequences received by the TLK3114SA device,
either on the transmit data bus or on the high-speed receiver terminals, are forwarded without change to the MDIO
registers in the TLK3114SA device.
The TLK3114SA device reports a fault by outputting a K28.4 (0x9C) on channel A, 0x00 on channels B and C, and
either 0x01 for local faults or 0x02 for remote faults on the receive data terminals for channel D. Forwarding of remote
faults is handled as a normal transmission.
Table 3−7. Local and Remote Fault Sequences
CHANNEL DESCRIPTION
RDA[7:0]
Channel A†
RDA8
RDA9
LOCAL FAULT
Sequence‡
1
1
REMOTE FAULT
Sequence‡
1
1
RDB[7:0]
00
00
Channel B
RDB8
0
0
RDB9
0
0
RDC[7:0]
00
00
Channel C
RDC8
0
0
RDC9
0
0
RDD[7:0]
01
02
Channel D
RDD8
0
0
RDD9
0
0
† _{Channels A, B, C, and D are equal to the XGMII lanes 0, 1, 2, and 3, respectively.}
‡ _{The sequence character is equal to 0x9C.}
3.16 Receive Synchronization and Skew Compensation
When the TLK3114SA device is configured in channel sync mode, a FIFO is enabled in the parallel receive data path
on each channel to compensate for channel skew and clock phase tolerance differences between the recovered
clocks for each channel and the receive output clock, RCA, as is shown in Figure 3−9. This FIFO has a depth of
11 bytes.
3−9