TLK3114SA_13 Datasheet, PDF (64/66 Pages) Texas Instruments – 10-Gbps XAUI Transceiver

50 Ω
Output
VREF
50 Ω
50 Ω
(optional)
+
Transmission Line
VDDQ
_
RΩ
PCB
RΩ
GND
VREF
Input
NOTE: The output buffer of the TLK3114SA has on-chip termination of 50 Ω. The
output signal is compliant with the JEDEC SSTL_2 Class 1 specification.
Line termination on the receive end is optional and not recommended for
low-power applications.
Figure 4−10. SSTL_2 Class 1 I/O
50 Ω
Output
50 Ω
Transmission Line
PCB
+
VDDQ
_
RΩ
RΩ
GND
VREF
Input
NOTE: The TLK3114SA provides a push-pull effect on the output buffer for
externally sourced series terminated loads. In HSTL mode, the signal swing
is small, allowing for minimal power consumption and low electromagnetic
emission (EME). To assure sufficient signal levels on the receive side, no
termination resistor is used.
Figure 4−11. HSTL I/O
4.12 Package Dissipation Rating
PARAMETER
θ_JA
Junction-to-free air thermal resistance
TEST CONDITION
Airflow = 0 M/S
Airflow = 1 M/S
Airflow = 2 M/S
MIN TYP MAX UNIT
21.6
°C/W
17.8
°C/W
16.7
°C/W
4−7