TLK3114SA_13 Datasheet, PDF (59/66 Pages) Texas Instruments – 10-Gbps XAUI Transceiver

This clock must be crystal referenced to meet the requirements of the above table. Contact TI for specific clocking
recommendations.
4.4 Reference Clock Electrical Characteristics (RFCP/N)
These characteristics are over recommended operating conditions unless otherwise noted.
VI
Vidth
CIN
RIN
Input voltage
Differential input voltage
Input capacitance
Input differential impedance
PARAMETER
MIN TYP MAX UNIT
825
1675 mV
200
mV_P-P
3 pF
80 100 120 Ω
4.5 LVTTL Electrical Characteristics
These characteristics are over recommended operating conditions unless otherwise noted.
See Chapter 2, Terminal Descriptions, for a list of LVTTL signals.
PARAMETER
TEST CONDITION
VOH High-level output voltage
IOH = −400 µA, VDD = MIN
VOL
Low-level output voltage
IOL = 1 mA, VDD = MIN
VIH
High-level input voltage
VIL
Low-level input voltage
IH
High input current
VDD = MAX, VIN = 2 V
IL
Low input current
VDD = MAX, VIN = 0.4 V
CIN
Input capacitance
MIN
VDD−0.2
0
2
TYP MAX UNIT
VDD V
0.25 0.6 V
3.5 V
0.8 V
40 µA
−600 µA
4 pF
4.6 SSTL_2 Class 1 Signals
See Chapter 2, Terminal Descriptions, for a list of SSTL_2 Class 1 signals.
NOTE: For more information on SSTL_2 Class 1 specifications and test conditions, see the
EIA/JEDEC, Stub Series Terminated Logic For 2.5 V (SSTL_2), EIA/JESD8-9A, Dec 2000.
VOH(dc)
VOL(dc)
VIH(dc)
VIL(dc)
VIH(ac)
VIL(ac)
PARAMETER
High-level output voltage
Low-level output voltage
High-level dc input voltage
Low-level dc input voltage
High-level ac input voltage
Low-level ac input voltage
IOH(dc) High-output current
IOL(dc)
CIN
Low-output current
Input capacitance
TEST CONDITION
DC input, logic high
DC input, logic low
AC input, logic high
AC input, logic low
VDDQ = 2.3 V,
VOUT = VDDQ–0.62 V
VDDQ = 2.3 V, VOUT = 0.54 V
MIN
1.76
Vref+0.18
−0.3
Vref+0.35
−7.6
TYP
MAX UNIT
V
0.74 V
VDDQ+0.3 V
Vref–0.18 V
V
Vref–0.35 V
mA
7.6
mA
4 pF
4−2