SMJ320VC5416HFGW10 Datasheet, PDF (86/96 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Electrical Specifications
HAS
Second Byte
t_su(HBV-DSL)
HAD^†
HBIL
t_{su(HBV-DSL)‡}
First Byte
Valid
t_su(HSL-DSL)
t_h(DSL-HBV)
t_{h(DSL-HBV)‡}
Second Byte
Valid
HCS
HDS
HRDY
HD READ
t_w(DSH)
t_d(DSH-HYH)
t_d(DSH-HYL)
t_w(DSL)
t_en(DSL-HD)
t_d(DSL-HDV2)
t_h(DSH-HDV)R
Valid
t_d(DSL-HDV1)
Valid
Valid
HD WRITE
t_su(HDV-DSH)
t_h(DSH-HDV)W
Valid
t_v(HYH-HDV)
Valid
Valid
Processor
CLK
t_d(COH-HYH)
† _{HAD refers to HCNTL0, HCNTL1, and HR/W.}
‡ _{When HAS is not used (HAS always high)}
Figure 5--28. Using HDS to Control Accesses (HCS Always Low)
76 SGUS035A
April 2003 -- Revised July 2003