SMJ320VC5416HFGW10 Datasheet, PDF (15/96 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Introduction
2.3 Signal Descriptions
Table 2--2 lists each signal, function, and operating mode(s) grouped by function. See Section 2.2 for exact
pin locations based on package type.
Table 2--2. Signal Descriptions
TERMINAL
NAME
I/O^†
DESCRIPTION
DATA SIGNALS
A22 (MSB)
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0 (LSB)
I/O/Z^‡§
Parallel address bus A22 [most significant bit (MSB)] through A0 [least significant bit (LSB)]. The sixteen LSB
lines, A0 to A15, are multiplexed to address external memory (program, data) or I/O. The seven MSB lines, A16
to A22, address external program space memory. A22--A0 is placed in the high-impedance state in the hold
mode. A22--A0 also goes into the high-impedance state when OFF is low.
A17--A0 are inputs in HPI16 mode. These pins can be used to address internal memory via the host-port interface
(HPI) when the HPI16 pin is high. These pins also have Schmitt trigger inputs.
The address bus has a bus holder feature that eliminates passive components and the power dissipation
associated with them. The bus holder keeps the address bus at the previous logic level when the bus goes into
a high-impedance state.
D15 (MSB)
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0 (LSB)
I/O/Z^‡§
Parallel data bus D15 (MSB) through D0 (LSB). D15--D0 is multiplexed to transfer data between the core CPU
and external data/program memory or I/O devices or HPI in HPI16 mode (when HPI16 pin is high). D15--D0 is
placed in the high-impedance state when not outputting data or when RS or HOLD is asserted. D15--D0 also goes
into the high-impedance state when OFF is low. These pins also have Schmitt trigger inputs.
The data bus has a bus holder feature that eliminates passive components and the power dissipation associated
with them. The bus holder keeps the data bus at the previous logic level when the bus goes into the
high-impedance state. The bus holders on the data bus can be enabled/disabled under software control.
† _{I = Input, O = Output, Z = High-impedance, S = Supply}
‡ _{These pins have Schmitt trigger inputs.}
§ _{This pin has an internal bus holder controlled by way of the BSCR register.}
¶ _{This pin has an internal pullup resistor.}
# _{This pin has an internal pulldown resistor.}
April 2003 -- Revised July 2003
SGUS035A
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