SMJ320VC5416HFGW10 Datasheet, PDF (20/96 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Functional Overview
3 Functional Overview
The following functional overview is based on the block diagram in Figure 3--1.
P, C, D, E Buses and Control Signals
54X cLEAD
64K RAM
Single Access
Program
64K RAM
Dual Access
Program/Data
MBus
TI BUS
RHEA
Bridge
RHEA Bus
16K Program
ROM
GPIO
McBSP1
XIO
Enhanced XIO
McBSP2
McBSP3
16HPI
16 HPI
xDMA
logic
RHEAbus
TIMER
APLL
Clocks
JTAG
Figure 3--1. SMJ320VC5416 Functional Block Diagram
3.1 Memory
The 5416 device provides both on-chip ROM and RAM memories to aid in system performance and
integration.
3.1.1 Data Memory
The data memory space addresses up to 64K of 16-bit words. The device automatically accesses the on-chip
RAM when addressing within its bounds. When an address is generated outside the RAM bounds, the device
automatically generates an external access.
The advantages of operating from on-chip memory are as follows:
• Higher performance because no wait states are required
• Higher performance because of better flow within the pipeline of the central arithmetic logic unit (CALU)
• Lower cost than external memory
• Lower power than external memory
The advantage of operating from off-chip memory is the ability to access a larger address space.
10 SGUS035A
April 2003 -- Revised July 2003