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SMJ320VC5416HFGW10 Datasheet, PDF (71/96 Pages) Texas Instruments – Fixed-Point Digital Signal Processor
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CLKOUT
HOLD
HOLDA
A[22:0]
PS, DS, IS
D[15:0]
R/W
MSTRB
IOSTRB
tsu(HOLD)
tw(HOLD)
tsu(HOLD)
tv(HOLDA)
tv(HOLDA)
tw(HOLDA)
tdis(CLKL--A)
Electrical Specifications
ten(CLKL--A)
tdis(CLKL--RW)
tdis(CLKL--S)
tdis(CLKL--S)
Figure 5--14. HOLD and HOLDA Timings (HM = 1)
ten(CLKL--RW)
ten(CLKL--S)
ten(CLKL--S)
April 2003 -- Revised July 2003
SGUS035A
61
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