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SMJ320VC5416HFGW10 Datasheet, PDF (14/96 Pages) Texas Instruments – Fixed-Point Digital Signal Processor
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Introduction
2.2.1 Pin Assignments for the HFG Package
The SMJ320VC5416HFG 164-pin ceramic quad flatpack (CQFP) pin assignments are shown in Figure 2--1.
HFG PACKAGE†‡
(TOP VIEW)
VSS 1
NC 2
A22 3
NC 4
VSS 5
DV DD 6
A10 7
HD7 8
A11 9
A12 10
A13 11
A14 12
A15 13
NC 14
CV DD 15
HAS 16
VSS 17
CV DD 18
HCS 19
HR/W 20
READY 21
PS 22
CV DD 23
DS 24
VSS 25
IS 26
R/W 27
MSTRB 28
IOSTRB 29
MSC 30
XF 31
HOLDA 32
IAQ 33
HOLD 34
BIO 35
MP/MC 36
DV DD 37
NC 38
VSS 39
BDR1 40
BFSR1 41
123 A18
122 A17
121 VSS
120 A16
119 D5
118 D4
117 D3
116 D2
115 D1
114 D0
113 RS
112 X2/CLKIN
111 X1
110 HD3
109 CLKOUT
108 CVDD
107 VSS
106 HPIENA
105
104
CVDD
NC
103 VSS
102 TMS
101 TCK
100 TRST
99
98
CVDD
TDI
97 VSS
96 TDO
95 EMU1/OFF
94 EMU0
93 TOUT
92 HD2
91 HPI16
90 CLKMD3
89 CLKMD2
88 CLKMD1
87 DVDD
86 BDX1
85 BFSX1
84 BCLKX1
83 VSS
NC -- No internal connection
† NC = No connection
‡ DVDD is the power supply for the I/O pins while CVDD is the power supply for the core CPU, and VSS is the ground for both the I/O pins and the
core CPU.
Figure 2--1. 164-Pin HFG Ceramic Quad Flatpack (Top View)
4
SGUS035A
April 2003 -- Revised July 2003
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