SMJ320VC5416HFGW10 Datasheet, PDF (50/96 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

Functional Overview
NAME
DMDSTP
DMIDX0
DMIDX1
DMFRI0
DMFRI1
DMGSA0
DMGDA0
DMGCR0
DMGFR0
XSRCDP
XDSTDP
DMGSA1
DMGDA1
DMGCR1
DMGFR1
DMGSA2
DMGDA2
DMGCR2
DMGFR2
DMGSA3
DMGDA3
DMGCR3
DMGFR3
DMGSA4
DMGDA4
DMGCR4
DMGFR4
DMGSA5
DMGDA5
DMGCR5
DMGFR5
Table 3--17. DMA Subbank Addressed Registers (Continued)
ADDRESS
SUB-
ADDRESS
DESCRIPTION
56h/57h
1Fh
DMA destination program page address (common channel)
56h/57h
20h
DMA element index address register 0
56h/57h
21h
DMA element index address register 1
56h/57h
22h
DMA frame index register 0
56h/57h
23h
DMA frame index register 1
56h/57h
24h
DMA global source address reload register, channel 0
56h/57h
25h
DMA global destination address reload register, channel 0
56h/57h
26h
DMA global count reload register, channel 0
56h/57h
27h
DMA global frame count reload register, channel 0
56h/57h
28h
DMA extended source data page (currently not supported)
56h/57h
29h
DMA extended destination data page (currently not supported)
56h/57h
2Ah
DMA global source address reload register, channel 1
56h/57h
2Bh
DMA global destination address reload register, channel 1
56h/57h
2Ch
DMA global count reload register, channel 1
56h/57h
2Dh
DMA global frame count reload register, channel 1
56h/57h
2Eh
DMA global source address reload register, channel 2
56h/57h
2Fh
DMA global destination address reload register, channel 2
56h/57h
30h
DMA global count reload register, channel 2
56h/57h
31h
DMA global frame count reload register, channel 2
56h/57h
32h
DMA global source address reload register, channel 3
56h/57h
33h
DMA global destination address reload register, channel 3
56h/57h
34h
DMA global count reload register, channel 3
56h/57h
35h
DMA global frame count reload register, channel 3
56h/57h
36h
DMA global source address reload register, channel 4
56h/57h
37h
DMA global destination address reload register, channel 4
56h/57h
38h
DMA global count reload register, channel 4
56h/57h
39h
DMA global frame count reload register, channel 4
56h/57h
3Ah
DMA global source address reload register, channel 5
56h/57h
3Bh
DMA global destination address reload register, channel 5
56h/57h
3Ch
DMA global count reload register, channel 5
56h/57h
3Dh
DMA global frame count reload register, channel 5
40 SGUS035A
April 2003 -- Revised July 2003