LM3S5762 Datasheet, PDF (779/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Stellaris® LM3S5762 Microcontroller
21.2
21.2.1
AC Characteristics
Load Conditions
Unless otherwise specified, the following conditions are true for all timing measurements. Timing
measurements are for 4-mA drive strength.
Figure 21-1. Load Conditions
pin
C_L = 50 pF
GND
21.2.2
Clocks
Table 21-9. Phase Locked Loop (PLL) Characteristics
Parameter Parameter Name
Min
Nom
Max
Unit
f_{ref_crystal}
Crystal reference^a
3.579545
-
16.384
MHz
f_{ref_ext}
f_pll
External clock reference^a
PLL frequency^b
3.579545
-
-
400
16.384
-
MHz
MHz
T_READY
PLL lock time
-
-
0.5
ms
a. The exact value is determined by the crystal value programmed into the XTAL field of the Run-Mode Clock Configuration
(RCC) register.
b. PLL frequency is automatically calculated by the hardware based on the XTAL field of the RCC register.
Table 21-10 on page 779 shows the actual frequency of the PLL based on the crystal frequency used
(defined by the XTAL field in the RCC register).
Table 21-10. Actual PLL Frequency
XTAL
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
Crystal Frequency (MHz)
3.5795
3.6864
4.0
4.096
4.9152
5.0
5.12
6.0
6.144
7.3728
8.0
8.192
10.0
12.0
PLL Frequency (MHz)
400.904
398.1312
400
401.408
398.1312
400
399.36
400
399.36
398.1312
400
398.6773333
400
400
Error
0.0023%
0.0047%
-
0.0035%
0.0047%
-
0.0016%
-
0.0016%
0.0047%
0.0047%
0.0033%
-
-
November 17, 2011
779
Texas Instruments-Production Data