LM3S5762 Datasheet, PDF (10/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Table of Contents
List of Figures
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Figure 3-1.
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Figure 5-1.
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Figure 6-1.
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Figure 7-1.
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Figure 8-6.
Figure 9-1.
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Figure 10-1.
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Figure 10-4.
Figure 11-1.
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Figure 12-3.
Figure 12-4.
Figure 12-5.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 14-1.
Stellaris LM3S5762 Microcontroller High-Level Block Diagram .............................. 45
CPU Block Diagram ............................................................................................. 54
TPIU Block Diagram ............................................................................................ 55
Cortex-M3 Register Set ........................................................................................ 57
Bit-Band Mapping ................................................................................................ 77
Data Storage ....................................................................................................... 78
Vector Table ........................................................................................................ 84
Exception Stack Frame ........................................................................................ 86
SRD Use Example ............................................................................................. 100
JTAG Module Block Diagram .............................................................................. 159
Test Access Port State Machine ......................................................................... 162
IDCODE Register Format ................................................................................... 168
BYPASS Register Format ................................................................................... 168
Boundary Scan Register Format ......................................................................... 169
Basic RST Configuration .................................................................................... 172
External Circuitry to Extend Power-On Reset ....................................................... 172
Reset Circuit Controlled by Switch ...................................................................... 173
Main Clock Tree ................................................................................................ 177
Hibernation Module Block Diagram ..................................................................... 239
Clock Source Using Crystal ................................................................................ 241
Clock Source Using Dedicated Oscillator ............................................................. 241
Flash Block Diagram .......................................................................................... 260
μDMA Block Diagram ......................................................................................... 290
Example of Ping-Pong DMA Transaction ............................................................. 295
Memory Scatter-Gather, Setup and Configuration ................................................ 297
Memory Scatter-Gather, μDMA Copy Sequence .................................................. 298
Peripheral Scatter-Gather, Setup and Configuration ............................................. 300
Peripheral Scatter-Gather, μDMA Copy Sequence ............................................... 301
Digital I/O Pads ................................................................................................. 353
Analog/Digital I/O Pads ...................................................................................... 354
GPIODATA Write Example ................................................................................. 355
GPIODATA Read Example ................................................................................. 355
GPTM Module Block Diagram ............................................................................ 398
16-Bit Input Edge Count Mode Example .............................................................. 402
16-Bit Input Edge Time Mode Example ............................................................... 403
16-Bit PWM Mode Example ................................................................................ 404
WDT Module Block Diagram .............................................................................. 432
ADC Module Block Diagram ............................................................................... 456
Differential Sampling Range, V_{IN_ODD} = 1.5 V ...................................................... 460
Differential Sampling Range, V_{IN_ODD} = 0.75 V .................................................... 460
Differential Sampling Range, V_{IN_ODD} = 2.25 V .................................................... 461
Internal Temperature Sensor Characteristic ......................................................... 462
UART Module Block Diagram ............................................................................. 492
UART Character Frame ..................................................................................... 493
IrDA Data Modulation ......................................................................................... 495
SSI Module Block Diagram ................................................................................. 535
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November 17, 2011
Texas Instruments-Production Data