LM3S5762 Datasheet, PDF (25/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Stellaris® LM3S5762 Microcontroller
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PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 744
PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 ................................................... 744
PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 745
PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 745
PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ........................................... 745
PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 746
PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 746
PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 746
PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................ 747
PWM1 Counter (PWM1COUNT), offset 0x094 ................................................................ 747
PWM2 Counter (PWM2COUNT), offset 0x0D4 ............................................................... 747
PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................. 748
PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................. 748
PWM2 Compare A (PWM2CMPA), offset 0x0D8 ............................................................. 748
PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 749
PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................. 749
PWM2 Compare B (PWM2CMPB), offset 0x0DC ............................................................ 749
PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................ 750
PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................ 750
PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ................................................ 750
PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................ 753
PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................ 753
PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ................................................ 753
PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................ 756
PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ................................................. 756
PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................ 756
PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 757
PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................. 757
PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................. 757
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 758
PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................. 758
PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ............................. 758
PWM0 Fault Source 0 (PWM0FLTSRC0), offset 0x074 .................................................... 759
PWM1 Fault Source 0 (PWM1FLTSRC0), offset 0x0B4 .................................................... 759
PWM2 Fault Source 0 (PWM2FLTSRC0), offset 0x0F4 .................................................... 759
PWM0 Fault Pin Logic Sense (PWM0FLTSEN), offset 0x800 ............................................ 760
PWM0 Fault Status 0 (PWM0FLTSTAT0), offset 0x804 .................................................... 761
PWM1 Fault Status 0 (PWM1FLTSTAT0), offset 0x884 .................................................... 761
PWM2 Fault Status 0 (PWM2FLTSTAT0), offset 0x904 .................................................... 761
November 17, 2011
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