LM3S5762 Datasheet, PDF (677/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Stellaris® LM3S5762 Microcontroller
OTG A /
Host
Register 50: USB Control and Status Endpoint 0 High (USBCSRH0), offset
0x103
USBSR0H is an 8-bit register that provides control and status bits for endpoint 0.
OTG B /
Device
OTG A / Host Mode
USB Control and Status Endpoint 0 High (USBCSRH0)
Base 0x4005.0000
Offset 0x103
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
reserved
DTWE
DT
FLUSH
Type RO
RO
RO
RO
RO
W1S
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit/Field
7:3
2
1
Name
reserved
DTWE
DT
Type
RO
W1S
R/W
Reset
0x0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Data Toggle Write Enable
Value Description
0 The DT bit cannot be written.
1 Enables the current state of the endpoint 0 data toggle to be
written (see DT bit).
This bit is automatically cleared once the new value is written.
Data Toggle
When read, this bit indicates the current state of the endpoint 0 data
toggle.
If DTWE is set, this bit may be written with the required setting of the data
toggle. If DTWE is Low, this bit cannot be written. Care should be taken
when writing to this bit as it should only be changed to RESET USB
endpoint 0.
November 17, 2011
677
Texas Instruments-Production Data