LM3S5762 Datasheet, PDF (709/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Stellaris® LM3S5762 Microcontroller
Bit/Field
6
5
4
3
Name
PFLTAEN
PFLTSEN
PFLTEN
reserved
Type
R/W
Reset
0
Description
Power Fault Action Enable
This bit specifies whether a USB power fault triggers any automatic
corrective action regarding the driven state of the USB0EPEN signal.
Value Description
0 Disabled
USB0EPEN is controlled by the combination of the EPEN and
EPENDE bits.
1 Enabled
The USB0EPEN output is automatically changed to the state
specified by the PFLTACT field.
R/W
0
Power Fault Sense
This bit specifies the logical sense of the USB0PFLT input signal that
indicates an error condition.
The complementary state is the inactive state.
Value Description
0 Low Fault
If USB0PFLT is driven Low, the power fault is signaled internally
(if enabled by the PFLTEN bit).
1 High Fault
If USB0PFLT is driven High, the power fault is signaled internally
(if enabled by the PFLTEN bit).
R/W
0
Power Fault Input Enable
This bit specifies whether the USB0PFLT input signal is used in internal
logic.
Value Description
0 Not Used
The USB0PFLT signal is ignored.
1 Used
The USB0PFLT signal is used internally.
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
November 17, 2011
709
Texas Instruments-Production Data