LM3S5762 Datasheet, PDF (7/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Stellaris® LM3S5762 Microcontroller
12.3.4 Analog-to-Digital Converter .......................................................................................... 458
12.3.5 Differential Sampling ................................................................................................... 459
12.3.6 Internal Temperature Sensor ........................................................................................ 461
12.4 Initialization and Configuration ..................................................................................... 462
12.4.1 Module Initialization ..................................................................................................... 462
12.4.2 Sample Sequencer Configuration ................................................................................. 462
12.5 Register Map .............................................................................................................. 463
12.6 Register Descriptions .................................................................................................. 464
13 Universal Asynchronous Receivers/Transmitters (UARTs) ............................. 491
13.1 Block Diagram ............................................................................................................ 492
13.2 Signal Description ....................................................................................................... 492
13.3 Functional Description ................................................................................................. 493
13.3.1 Transmit/Receive Logic ............................................................................................... 493
13.3.2 Baud-Rate Generation ................................................................................................. 493
13.3.3 Data Transmission ...................................................................................................... 494
13.3.4 Serial IR (SIR) ............................................................................................................. 494
13.3.5 FIFO Operation ........................................................................................................... 495
13.3.6 Interrupts .................................................................................................................... 496
13.3.7 Loopback Operation .................................................................................................... 497
13.3.8 DMA Operation ........................................................................................................... 497
13.3.9 IrDA SIR block ............................................................................................................ 497
13.4 Initialization and Configuration ..................................................................................... 497
13.5 Register Map .............................................................................................................. 498
13.6 Register Descriptions .................................................................................................. 499
14 Synchronous Serial Interface (SSI) .................................................................... 534
14.1 Block Diagram ............................................................................................................ 535
14.2 Signal Description ....................................................................................................... 535
14.3 Functional Description ................................................................................................. 536
14.3.1 Bit Rate Generation ..................................................................................................... 536
14.3.2 FIFO Operation ........................................................................................................... 536
14.3.3 Interrupts .................................................................................................................... 537
14.3.4 Frame Formats ........................................................................................................... 537
14.3.5 DMA Operation ........................................................................................................... 545
14.4 Initialization and Configuration ..................................................................................... 545
14.5 Register Map .............................................................................................................. 546
14.6 Register Descriptions .................................................................................................. 547
15 Controller Area Network (CAN) Module ............................................................. 574
15.1 Block Diagram ............................................................................................................ 575
15.2 Signal Description ....................................................................................................... 575
15.3 Functional Description ................................................................................................. 576
15.3.1 Initialization ................................................................................................................. 577
15.3.2 Operation ................................................................................................................... 577
15.3.3 Transmitting Message Objects ..................................................................................... 578
15.3.4 Configuring a Transmit Message Object ........................................................................ 578
15.3.5 Updating a Transmit Message Object ........................................................................... 580
15.3.6 Accepting Received Message Objects .......................................................................... 580
15.3.7 Receiving a Data Frame .............................................................................................. 580
15.3.8 Receiving a Remote Frame .......................................................................................... 581
November 17, 2011
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