LM3S5762 Datasheet, PDF (23/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Stellaris® LM3S5762 Microcontroller
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USB Connect Timing (USBCONTIM), offset 0x07A .......................................................... 662
USB OTG VBUS Pulse Timing (USBVPLEN), offset 0x07B .............................................. 663
USB Full-Speed Last Transaction to End of Frame Timing (USBFSEOF), offset 0x07D ...... 664
USB Low-Speed Last Transaction to End of Frame Timing (USBLSEOF), offset 0x07E ...... 665
USB Transmit Functional Address Endpoint 0 (USBTXFUNCADDR0), offset 0x080 ........... 666
USB Transmit Functional Address Endpoint 1 (USBTXFUNCADDR1), offset 0x088 ........... 666
USB Transmit Functional Address Endpoint 2 (USBTXFUNCADDR2), offset 0x090 ........... 666
USB Transmit Functional Address Endpoint 3 (USBTXFUNCADDR3), offset 0x098 ........... 666
USB Transmit Hub Address Endpoint 0 (USBTXHUBADDR0), offset 0x082 ...................... 667
USB Transmit Hub Address Endpoint 1 (USBTXHUBADDR1), offset 0x08A ...................... 667
USB Transmit Hub Address Endpoint 2 (USBTXHUBADDR2), offset 0x092 ...................... 667
USB Transmit Hub Address Endpoint 3 (USBTXHUBADDR3), offset 0x09A ...................... 667
USB Transmit Hub Port Endpoint 0 (USBTXHUBPORT0), offset 0x083 ............................. 668
USB Transmit Hub Port Endpoint 1 (USBTXHUBPORT1), offset 0x08B ............................ 668
USB Transmit Hub Port Endpoint 2 (USBTXHUBPORT2), offset 0x093 ............................. 668
USB Transmit Hub Port Endpoint 3 (USBTXHUBPORT3), offset 0x09B ............................ 668
USB Receive Functional Address Endpoint 1 (USBRXFUNCADDR1), offset 0x08C ........... 669
USB Receive Functional Address Endpoint 2 (USBRXFUNCADDR2), offset 0x094 ........... 669
USB Receive Functional Address Endpoint 3 (USBRXFUNCADDR3), offset 0x09C ........... 669
USB Receive Hub Address Endpoint 1 (USBRXHUBADDR1), offset 0x08E ...................... 670
USB Receive Hub Address Endpoint 2 (USBRXHUBADDR2), offset 0x096 ....................... 670
USB Receive Hub Address Endpoint 3 (USBRXHUBADDR3), offset 0x09E ...................... 670
USB Receive Hub Port Endpoint 1 (USBRXHUBPORT1), offset 0x08F ............................. 671
USB Receive Hub Port Endpoint 2 (USBRXHUBPORT2), offset 0x097 ............................. 671
USB Receive Hub Port Endpoint 3 (USBRXHUBPORT3), offset 0x09F ............................. 671
USB Maximum Transmit Data Endpoint 1 (USBTXMAXP1), offset 0x110 .......................... 672
USB Maximum Transmit Data Endpoint 2 (USBTXMAXP2), offset 0x120 .......................... 672
USB Maximum Transmit Data Endpoint 3 (USBTXMAXP3), offset 0x130 .......................... 672
USB Control and Status Endpoint 0 Low (USBCSRL0), offset 0x102 ................................. 673
USB Control and Status Endpoint 0 High (USBCSRH0), offset 0x103 ............................... 677
USB Receive Byte Count Endpoint 0 (USBCOUNT0), offset 0x108 ................................... 679
USB Type Endpoint 0 (USBTYPE0), offset 0x10A ............................................................ 680
USB NAK Limit (USBNAKLMT), offset 0x10B .................................................................. 681
USB Transmit Control and Status Endpoint 1 Low (USBTXCSRL1), offset 0x112 ............... 682
USB Transmit Control and Status Endpoint 2 Low (USBTXCSRL2), offset 0x122 ............... 682
USB Transmit Control and Status Endpoint 3 Low (USBTXCSRL3), offset 0x132 ............... 682
USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1), offset 0x113 .............. 686
USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2), offset 0x123 ............. 686
USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3), offset 0x133 ............. 686
USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset 0x114 ........................... 690
USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset 0x124 ........................... 690
USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset 0x134 ........................... 690
USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1), offset 0x116 ............... 691
USB Receive Control and Status Endpoint 2 Low (USBRXCSRL2), offset 0x126 ............... 691
USB Receive Control and Status Endpoint 3 Low (USBRXCSRL3), offset 0x136 ............... 691
USB Receive Control and Status Endpoint 1 High (USBRXCSRH1), offset 0x117 .............. 696
USB Receive Control and Status Endpoint 2 High (USBRXCSRH2), offset 0x127 .............. 696
USB Receive Control and Status Endpoint 3 High (USBRXCSRH3), offset 0x137 .............. 696
November 17, 2011
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Texas Instruments-Production Data