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LM3S5762 Datasheet, PDF (766/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller
Signal Tables
Table 19-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Typea Description
PB5
I/O
TTL
GPIO port B bit 5.
57
CAN0Tx
O
TTL
CAN module 0 transmit.
PB4
I/O
TTL
GPIO port B bit 4.
58
CAN0Rx
I
TTL
CAN module 0 receive.
59
VDD
-
Power Positive supply for I/O and some logic.
60
GND
-
Power Ground reference for logic and I/O pins.
PD0
I/O
TTL
GPIO port D bit 0.
61
PWM0
O
TTL
PWM 0. This signal is controlled by PWM Generator 0.
PD1
I/O
TTL
GPIO port D bit 1.
62
PWM1
O
TTL
PWM 1. This signal is controlled by PWM Generator 0.
PD2
I/O
TTL
GPIO port D bit 2.
63
PWM2
O
TTL
PWM 2. This signal is controlled by PWM Generator 1.
PD3
I/O
TTL
GPIO port D bit 3.
64
PWM3
O
TTL
PWM 3. This signal is controlled by PWM Generator 1.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
Table 19-2. Signals by Signal Name
Pin Name
ADC0
ADC1
ADC2
ADC3
CAN0Rx
CAN0Tx
CCP0
CCP1
CCP2
CCP3
CCP4
Fault0
GND
GNDA
Pin Number
1
2
5
6
58
57
47
56
11
8
16
27
10
13
24
29
36
39
44
53
60
4
Pin Type
I
I
I
I
I
O
I/O
I/O
I/O
I/O
I/O
I
-
-
HIB
33
O
Buffer Typea Description
Analog Analog-to-digital converter input 0.
Analog Analog-to-digital converter input 1.
Analog Analog-to-digital converter input 2.
Analog Analog-to-digital converter input 3.
TTL
CAN module 0 receive.
TTL
CAN module 0 transmit.
TTL
Capture/Compare/PWM 0.
TTL
Capture/Compare/PWM 1.
TTL
Capture/Compare/PWM 2.
TTL
Capture/Compare/PWM 3.
TTL
Capture/Compare/PWM 4.
TTL
PWM Fault 0.
Power Ground reference for logic and I/O pins.
Power
OD
The ground reference for the analog circuits (ADC, etc.).
These are separated from GND to minimize the electrical
noise contained on VDD from affecting the analog functions.
An output that indicates the processor is in Hibernate mode.
766
November 17, 2011
Texas Instruments-Production Data