LM3S5762 Datasheet, PDF (765/841 Pages) Texas Instruments – Stellaris® LM3S5762 Microcontroller

Stellaris® LM3S5762 Microcontroller
Table 19-1. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
36
GND
-
Power Ground reference for logic and I/O pins.
VBAT
37
-
Power Power source for the Hibernation module. It is normally connected
to the positive terminal of a battery and serves as the battery
backup/Hibernation module power-source supply.
38
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
39
GND
-
Power Ground reference for logic and I/O pins.
40
RST
I
TTL
System reset input.
PB0
I/O
TTL
GPIO port B bit 0.
USB0ID
41
I
Analog This signal senses the state of the USB ID signal. The USB PHY
enables an integrated pull-up, and an external element (USB
connector) indicates the initial state of the USB controller (pulled
down is the A side of the cable and pulled up is the B side).
PB1
I/O
TTL
GPIO port B bit 1.
42
USB0VBUS
I
Analog This signal is used during the session request protocol. This signal
allows the USB PHY to both sense the voltage level of VBUS, and
pull up VBUS momentarily during VBUS pulsing.
43
VDD
-
Power Positive supply for I/O and some logic.
44
GND
-
Power Ground reference for logic and I/O pins.
45
USB0DM
I/O
Analog Bidirectional differential data pin (D- per USB specification) for
USB0.
46
USB0DP
I/O
Analog Bidirectional differential data pin (D+ per USB specification) for
USB0.
PB2
I/O
TTL
GPIO port B bit 2.
47
CCP0
I/O
TTL
Capture/Compare/PWM 0.
48
USB0RBIAS
O
Analog 9.1-kΩ resistor (1% precision) used internally for USB analog
circuitry.
PC3
I/O
TTL
GPIO port C bit 3.
49
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
50
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
51
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I/O
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
52
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
53
GND
-
Power Ground reference for logic and I/O pins.
54
VDD25
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals.
PB7
I/O
TTL
GPIO port B bit 7.
55
NMI
I
TTL
Non-maskable interrupt.
PB6
I/O
TTL
GPIO port B bit 6.
56
CCP1
I/O
TTL
Capture/Compare/PWM 1.
November 17, 2011
765
Texas Instruments-Production Data