TCM4400 Datasheet, PDF (62/72 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT

Table 4–20. Volume Control Gain Settings
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^{VOLCTL2 VOLCTL1 VOLCTL0 RELATIVE GAIN}
0
0
1
0
0 dB
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁
1
1
0
– 6 dB
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₂
0
0
0
– 12 dB
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₃
1
0
0
– 18 dB
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₄
0
1
1
– 24 dB
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₅
1
0
1
Mute
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₆
0
0
1
Mute
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 7
1
1
1
Mute
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{4.10.17 Voice Band Control Register}
The values in the voice band control register are defined in Table 4–21.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _RESERVD
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{R = 0}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
Table 4–21. Voice Band Control Register
VBCTL3: VOICE BAND CONTROL REGISTER
RESERVD
VCLK
MODE
DAI
MD1
DAI
MD0
VDAI
DAI
ON
VA VIZ-
LOOP BUS
R=0
R /W R/W R/W R/W R/W R/W R/W
0
0
0
0
0
0
0
0
VRST
R/W
0
ADDRESS: 12 R/W
0 1 1 0 0 1/0
←ACCESS TYPE
←VALUE AT RESET
VALOOP: When this bit is set to 1, the internal analog loop of output samples is sent to the
audio input terminal; standard audio paths are connected together; and auxiliary
audio paths are connected together.
VIZBUS:
When this bit is set to 1, VFS, VCLK, and VDX are put in a hi-Z state when there is
nothing to transfer to the DSP. When it is cleared to 0, VFS and VCLK are put in
V_SS when there is nothing to transfer to the DSP, and the VDX bus drives an
undefined value (value depends on the previous serial data transfers).
VRST:
When this bit is 1, resets the digital parts of the audio codec (digital filter and
modulator). This is not a toggle bit and has to be set to 0 to remove the reset
condition.
DAION:
When this bit is cleared to 0, the DAI block is in power down; when it is set to 1, the
DAI block is active.
VDAI:
Writing a 1 to this bit starts the SSCLK (104 kHz DAI clock) on reception of the first
sample. This bit is automatically reset to 0 by SSRST after reception of the last
sample.
RESERVD: Reserved bits for testing
DAIMD (0 –1): DAI mode selection as defined in Table 4–22.
VCLKMODE: When cleared to 0, this bit allows selection of VCLK in burst mode. When set to 1,
this bit allows selection of VCLK in continuous mode.
DAIMD1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₁
DAIMD0
0
1
0
1
Table 4–22. DAI Mode Selection
DAI MODE
Normal operation (no tested device using DAI)
Test of speech decoder / DTX functions (downlink)
Test of speech encoder / DTX functions (uplink)
Test of acoustic devices and A/D and D/A (voice path)
4–26