TCM4400 Datasheet, PDF (12/72 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT

1.4 Terminal Functions
TERMINAL
I/O
NAME NO.
DESCRIPTION
ADCMID
44 I/O Reference voltage of auxiliary A/D converters; decoupling only (analog)
ADIN1
36
I Auxiliary 10-bit ADC input 1 (analog)
ADIN2
37
I Auxiliary 10-bit ADC input 2 (analog)
ADIN3
38
I Auxiliary 10-bit ADC input 3 (analog)
ADIN4
39
I Auxiliary 10-bit ADC input 4 (analog)
ADIN5
40
I Auxiliary 10-bit ADC input 5 (analog)
AFC
46 O Automatic frequency control DAC output (analog)
AGC
45 O Automatic gain control DAC output (analog)
APC
47 O Automatic power control DAC output (analog)
AUXI
29
I Auxiliary (high-level) speech signal input (analog)
AUXO
34 O Auxiliary downlink (voice codec) amplifier output – single-ended (analog)
AVDD1
7
AVDD2
56
AVDD3
41
AVDD3/5 43
AVDD4
30
AVSS1
11
AVSS2
55
AVSS3
48
AVSS4
31
BCAL
72
Analog positive power supply (band gap, internal common-mode generator, bias current generator)
Analog positive power supply (baseband codec)
Analog positive power supply (auxiliary RF functions)
Analog positive power supply (auxiliary RF functions) – can be in the 3-V to 5-V range
Analog positive power supply (voice codec)
Analog negative power supply (band gap, internal common-mode generator, bias current generator)
Analog negative power supply (baseband codec)
Analog negative power supply (auxiliary RF functions)
Analog negative power supply (voice codec)
I Baseband uplink or downlink offset calibration enable (timing interface)
BCLKR
5 I/O DSP serial interface clock input. This clock signal is provided by the DSP or the TCM4400 (digital).
BCLKX
2
O DSP serial interface clock output. The frequency is the same as MCLK (digital/3-state).
BDR
4
I DSP serial interface serial data input (digital)
BDX
3
O DSP serial interface serial data output (digital/3-state)
BENA
71
I Burst transmit or receive enable (depends on status of BULON and BDLON) (digital)
BDLON
74
I Power on of baseband downlink (timing interface)
BFSR
6
I DSP serial interface receive frame synchronization input (digital)
BFSX
1
O DSP serial interface transmit frame synchronization output (digital/3-state)
BDLIN
54
I In-phase baseband input (–) – downlink path (analog)
BDLIP
53
I In-phase baseband input (+) – downlink path (analog)
BDLQN
52
I Quadrature baseband input (–) – downlink path (analog)
BDLQP
51
I Quadrature baseband input (+) – downlink path (analog)
BULIN
59 O In-phase baseband output (–) – uplink path (analog)
BULIP
60 O In-phase baseband output (+) – uplink path (analog)
BULON
73
I Serial clock input (serial interface) (digital)
BULQN
57 O Quadrature baseband output (–) – uplink path (analog)
BULQP
58 O Quadrature baseband output (+) – uplink path (analog)
DVDD1
80
DVDD2
66
DVDD3
42
DVDD4
21
Digital positive power supply (baseband and timing serial interfaces)
Digital positive power supply (baseband codec)
Digital positive power supply (auxiliary RF functions)
Digital positive power supply (voice band codec and serial interface)
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