TCM4400 Datasheet, PDF (39/72 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT

Timing Interface
Din
270 kHz
Burst
Register
Differential
Encoder
Power
Register
Burst Timing
Control
Gaussian
Filter
Integrator
Ramp-Up
Shaper
To Power
Control DAC
–
Offset
+
Register
Cosine
Table
8-Bit
DAC
fs = 16 x 270 kHz
Sine
Table
8-Bit
DAC
Low-Pass
Filter
BULI
PBULIN
I/Q Gain Unbalance
Low-Pass
Filter
BULQP
BULQN
Offset
–
Register
+
Figure 4–2. Functional Structure of The Baseband Uplink Path
4.2 Baseband Downlink Path
The baseband downlink path includes two identical circuits for processing the baseband I and Q
components generated by the RF circuits. The first stage of the downlink path is a continuous-time
second-order antialiasing filter (see Figure 4–3) that prevents aliasing due to sampling in the ADC. This filter
also serves as an adaptation stage (input impedance and common-mode level) between external-world and
on-chip circuitry.
TYPICAL FREQUENCY RESPONSE OF THE
ANTIALIASING FILTER
10
0
– 10
– 20
– 30
– 40
– 50
– 60
– 70
102
103
104
105
106
107
f – Frequency – Hz
Figure 4–3. Antialiasing Filter
4–3