TCM4400 Datasheet, PDF (56/72 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT

4.10.9 Baseband Uplink I and Q Offset Registers
The baseband uplink I and Q offset registers contain the offset values for the I and Q components,
respectively, as given in Table 4–8 and Table 4–9.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _RESERVD
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _R
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
Table 4–8. Uplink I Offset Register
BULIOFF: BASEBAND UPLINK I OFFSET REGISTER
ULI-
OFF
8
ULI-
OFF
7
ULI-
OFF
6
ULI-
OFF
5
ULI-
OFF
4
ULI-
OFF
3
ULI-
OFF
2
ULI-
OFF
1
R/W R/W R/W R/W R/W R/W R/W R/W
0
1
1
1
1
1
1
1
ADDRESS: 3 R/W
ULI- 0 0 0 1 1 1/0
OFF
R/W
←ACCESS TYPE
1
←VALUE AT RESET
ULIOFF0 to ULIOFF1: Integration bits during calibration (to minimize sensitivity to noise)
ULIOFF2 to ULIOFF8: Value of the offset on I channel
RESERVD:
Reserved bits for testing purposes
R/W:
A 1 indicates a read operation; a 0 indicates a write operation.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _RESERVD
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _R
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ₀
Table 4–9. Uplink Q Offset Register
BULQOFF: BASEBAND UPLINK Q OFFSET REGISTER
ULQ
OFF
8
ULQ
OFF
7
ULQ
OFF
6
ULQ
OFF
5
ULQ
OFF
4
ULQ
OFF
3
ULQ
OFF
2
ULQ
OFF
1
R/W R/W R/W R/W R/W R/W R/W R/W
0
1
1
1
1
1
1
1
ULQ
OFF
0
R/W
1
ADDRESS: 4 R/W
0 0 1 0 0 1/0
←ACCESS TYPE
←VALUE AT RESET
ULQOFF0 to ULQOFF1: Integration bits during calibration (to minimize sensitivity to noise)
ULQOFF2 to ULQOFF8: Value of the offset on Q channel
RESERVD:
Reserved bits for testing purposes
R/W:
A 1 indicates a read operation; a 0 indicates a write operation.
4.10.10 Baseband Uplink I and Q D/A Conversion Registers
The I and Q component values generated by the I and Q uplink DAC during the conversion of analog data
are written to and read from the uplink I and Q DAC registers as defined in Table 4–10 and Table 4–11,
respectively.
Table 4–10. Uplink I DAC Register
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ BULIDAC: BASEBAND UPLINK I DAC REGISTER
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ RESERVD RESERVD ULI-
DAC
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 7
ULI-
DAC
6
ULI-
DAC
5
ULI-
DAC
4
ULI-
DAC
3
ULI-
DAC
2
ULI-
DAC
1
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^R
R
R/W R/W R/W R/W R/W R/W R/W
0
0
1
1
1
1
1
1
1
ULI-
DAC
0
R/W
1
ADDRESS: 6 R/W
0 0 1 1 0 1/0
←ACCESS TYPE
←VALUE AT RESET
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{ULIDAC0 to ULIDAC7: Data applies to the DAC of I channel.}
RESERVD:
Bits are reserved for testing purposes.
R/W:
A 1 indicates a read operation; a 0 indicates a write operation.
4–20