TCM4400 Datasheet, PDF (47/72 Pages) Texas Instruments – GSM/DCS BASEBAND AND VOICE A/D AND D/A RF INTERFACE CIRCUIT

4.6 JTAG Interface
TCM4400 provides a JTAG interface according to IEEE Std 1149.1. This interface uses five dedicated I/Os:
TCK (test clock), TMS (test mode select), TDI (scan input), TDO (scan output), and TRST (test reset). Inputs
TMS,TDI, and TRST contain a pullup device which makes their state high when they are not driven. Output
TDO is a three-state output which is Hi-Z except when data are shifted between TDI and TDO. TRST input
is intended for proper initialization of the state machine test access port (TAP) and boundary-scan cells.
System RESET is sent into the device through a boundary-scan register which has to be initialized by TRST
to allow the RESET signal to be propagated into the device; a good practice should be to connect RESET
and TRST terminals together.
4.6.1 Standard User Instructions Available
NAME
OPCODE
DESCRIPTION
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _BYPASS
11111
Connects the bypass register between TDI and TDO.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{SAMPLE/PRELOAD}
00010
Connects the boundary-scan register between TDI and TDO. This
mode captures a snapshot of the state of the digital I/Os of the device.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _EXTEST
00000
Connects the boundary-scan register between TDI and TDO. This
mode captures the state of the input terminals and forces the state of
the output pins. This mode is for testing printed-circuit board
connections between devices.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ IDCODE
00001
Connects the identification register between TDI and TDO. This is the
default configuration at reset.
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^INTEST
00011
Connects the boundary-scan register between TDI and TDO. This
mode forces the internal system input signals via the parallel latches of
the boundary-scan register and captures internal system outputs. The
purpose of this mode is to perform internal device tests independently
of the state of its input terminals. In this mode the internal system master
clock is derived from TCK and is active in the run-test-idle state of the
state machine to allow step-by-step operation of the device.
4.7 JTAG Interface Scan Chain Descriptions
The JTAG interface scan chains are described in the following sections.
4.7.1 Bypass Register
0
TDI
1
TDO
4.7.2 Instruction Register
0
0
0
0
0
TDI
5
4
3
2
1
TDO
4.7.3 Identification Register
0
0
0
TDI
32
31
30
0
0
29
28
0
0
27
26
0
0
25
24
0
23
0
0
0
0
22
21
20
19
1
1
18
17
0
1
0
1
0
0
0
0
0
0
1
0
1
1
1
1
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
TDO
4–11