DS90UH927Q-Q1 Datasheet, PDF (56/68 Pages) Texas Instruments – 5-MHz to 85-MHz 24-Bit Color FPD-Link III Serializer with HDCP

DS90UH927Q-Q1
SNLS433C – NOVEMBER 2012 – REVISED JANUARY 2015
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Layout Guidelines (continued)
10.1.1 CML Interconnect Guidelines
See SNLA008 and SNLA035 for full details.
• Use 100-Ω coupled differential pairs
• Use the S/2S/3S rule in spacings
– – S = space between the pair
– – 2S = space between pairs
– – 3S = space to LVCMOS signal
• Minimize the number of Vias
• Use differential connectors when operating above 500 Mbps line speed
• Maintain balance of the traces
• Minimize skew within the pair
• Terminate as close to the TX outputs and RX inputs as possible.
Additional general guidance can be found in the LVDS Owner’s Manual - available in PDF format from the Texas
Instruments web site at: http://www.ti.com/lit/ml/snla187/snla187.pdf
10.2 Layout Example
Notes:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning
and tolerancing per ASME Y14.5M
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical
performance.
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas
Instruments literature number SLUA271.
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525
may have alternate design recommendations.
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