DS90UH927Q-Q1 Datasheet, PDF (47/68 Pages) Texas Instruments – 5-MHz to 85-MHz 24-Bit Color FPD-Link III Serializer with HDCP

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DS90UH927Q-Q1
SNLS433C – NOVEMBER 2012 – REVISED JANUARY 2015
Register Maps (continued)
ADD
(dec)
194
ADD
(hex)
0xC2
Table 5. Serial Control Bus Registers (continued)
Register Name
Bit
Register
Type
Default
(hex)
Function
Description
HDCP CFG
7
RW
0x80 ENH LV
Enable Enhanced Link Verification
Allows checking of the encryption Pj value on every
16th frame.
0: Enhanced Link Verification disabled
1: Enhanced Link Verification enabled (default)
6
RW
HDCP
EESS
Enables Enhanced Encryption Status Signaling
(EESS) instead of the Original Encryption Status
Signaling (OESS).
0: OESS mode enabled (default)
1: EESS mode enabled
5
RW
TX RPTR
Transmit Repeater Enable
Enables the transmitter to act as a repeater. In this
mode, the HDCP Transmitter incorporates the
additional authentication steps required of an HDCP
Repeater.
0: Transmit Repeater mode disabled (default)
1: Transmit Repeater mode enabled
4:3
RW
ENC Mode
Encryption Control Mode
Determines mode for controlling whether encryption is
required for video frames.
00: Enc_Authenticated (default)
01: Enc_Reg_Control
10: Enc_Always
11: Enc_InBand_Control (per frame)
If the Repeater strap option is set at power-up,
Enc_InBand_Control (ENC_MODE == 11) will be
selected. Otherwise, the default will be
Enc_Authenticated mode (ENC_MODE == 00).
2
RW
Wait
Enable 100 ms Wait: The HDCP 1.3 specification
allows for a 100 ms wait to allow the HDCP Receiver
to compute the initial encryption values. The FPD-Link
III implementation ensures that the Receiver will
complete the computations before the HDCP
Transmitter. Thus the timer is unnecessary.
0: 100 ms timer disabled (default)
1: 100 ms timer enabled
1
RW
RX DET
SEL
RX Detect Select: Controls assertion of the Receiver
Detect Interrupt.
0: The Receiver Detect Interrupt will be asserted on
detection of an FPD-Link III Receiver. (default)
1: the Receiver Detect Interrupt will also require a
receive lock indication from the receiver.
0
RW
HDCP AV
MUTE
Enable AVMUTE This bit may only be set if the
HDCP_EESS bit is also set.
0: Resume normal operation (default)
1: Initiate AVMUTE operation. The transmitter will
ignore encryption status controls while in this state.
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