DS90UH927Q-Q1 Datasheet, PDF (23/68 Pages) Texas Instruments – 5-MHz to 85-MHz 24-Bit Color FPD-Link III Serializer with HDCP

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DS90UH927Q-Q1
SNLS433C – NOVEMBER 2012 – REVISED JANUARY 2015
7.3.14 I²S Audio Interface
The DS90UH927Q-Q1 serializer features six I²S input pins that, when paired with a DS90UH928Q-Q1
deserializer, supports surround sound audio applications. The bit clock (I2S_CLK) supports frequencies between
1 MHz and the smaller of <PCLK/2 or <13 MHz. Four I²S data inputs transport two channels of I²S-formatted
digital audio each, with each channel delineated by the word select (I2C_WC) input. I²S audio transport is not
available in Backwards Compatibility Mode (BKWD = 1).
I2S
Transmitter
Bit Clock
Word Select
Data
4
DS90UH927Q-Q1
I2S_CLK
I2S_WC
I2S_Dx
Figure 17. I²S Connection Diagram
I2S_WC
I2S_CLK
I2S_Dx
MSB
LSB MSB
LSB
Figure 18. I²S Frame Timing Diagram
When paired with a DS90UH926Q-Q1, the DS90UH927Q-Q1 I²S interface supports a single I²S data input
through I2S_DA (24-bit video mode), or two I²S data inputs through I2S_DA and I2S_DB (18-bit video mode).
Table 3 covers several common I²S sample rates:
Sample Rate (kHz)
32
44.1
48
96
192
32
44.1
48
96
192
32
44.1
48
96
192
Table 3. Audio Interface Frequencies
I2S Data Word Size (bits)
16
16
16
16
16
24
24
24
24
24
32
32
32
32
32
I2S CLK (MHz)
1.024
1.411
1.536
3.072
6.144
1.536
2.117
2.304
4.608
9.216
2.048
2.822
3.072
6.144
12.288
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