SM320VC5510A-EP Datasheet, PDF (47/82 Pages) Texas Instruments – SM320VC5510A-EP Fixed-Point Digital Signal Processor

Electrical Specifications
5.3 Electrical Characteristics Over Recommended Operating Case Temperature
Range (Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
High-level output
All output except CLKOUT
DVDD = 3.3 ± 0.3 V,
IOH = MAX
2.4
VOH _voltage
CLKOUT
CVDD = 1.6 ± 0.05 V,
IOH = MAX
1.24
V
VOL Low-level output voltage
IOL = MAX
0.4 V
Output-only or input/output pins with
bus holders
Input current for outputs
Bus holders enabled
CVDD = MAX,
VO = VSS to VDD
IIZ
in high impedance
All other output-only or input/output
pins
Bus holders disabled
CVDD = MAX,
VO = VSS to VDD
− 275
−5
275
µA
5
Input pins with internal pulldown
CVDD = MAX,
VI = VSS to VDD
−5
300
II
Input current
Input pins with internal pullup
Pullup enabled
CVDD = MAX,
VI = VSS to VDD
− 300
5 µA
All other input-only pins or input-only
pins with pullup/pulldown disabled
CVDD = MAX,
VI = VSS to VDD
−5
5
IDDC CVDD supply current, CPU + internal memory access ^†
CVDD = 1.6 V,
CPU clock = 200 MHz
TC = 25°C
112
mA
IDDP DVDD supply current, pins active ^‡
DVDD = 3.3 V
CPU clock = 100 MHz
TC = 25°C
8
mA
IDDC
CVDD supply current, standby
Only CLKGEN domain enabled, PLL enabled.
CVDD = 1.6 V
10-MHz clock input,
DPLL mode = x 20
TC = 25°C
32
mA
CVDD = 1.6 V
input clock stopped,
TC = 25°C
69
µA
IDDC
CVDD supply current, standby
All domains idled.
CVDD = 1.6 V
input clock stopped,
TC = 55°C
374
µA
CVDD = 1.6 V
input clock stopped,
TC = 85°C
976
µA
DVDD = 3.3 V
no pin activity,
TC = 25°C
10
µA
IDDP
DVDD supply current, standby
All domains idled.
DVDD = 3.3 V
no pin activity,
TC = 55°C
10
µA
DVDD = 3.3 V
no pin activity,
TC = 85°C
10
µA
Ci
Input capacitance
3
pF
Co
Output capacitance
3
pF
† _{Test Condition: CPU executing 75% Dual-MAC / 25% ADD with moderate data bus activity (table of sine values). CPU and CLKGEN domains}
are active. All other domains are idled. The DPLL is enabled.
‡ _{Test Condition: One word of a table of 16-bit sine values is written to the EMIF each microsecond (16 Mbps). Each EMIF output pin is connected}
to a 10-pF load capacitance.
August 2003 − Revised November 2003
SGUS045A
39