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LMH1982SQ-NOPB Datasheet, PDF (29/43 Pages) Texas Instruments – Multi-Rate Video Clock Generator with Genlock
LMH1982
www.ti.com
SNLS289C – APRIL 2008 – REVISED MARCH 2013
Genlock And Input Reference Control Registers
Register 00h
Bits 2-0: H Input Error Max Count (H_ERROR)
The H_ERROR bits control the reference detector's error threshold, which determines the maximum number of
missing H sync pulses before indicating a LOR. See section Programming the Loss of Reference (LOR)
Threshold.
Bit 3: Holdover on Loss of Reference (HOLDOVER)
The HOLDOVER bit controls the operating mode when a loss of reference occurs. See section Loss of
Reference (LOR).
Bit 4: Reference Select (RSEL)
The RSEL bit selects either REF_A or REF_B inputs as the reference to genlock the outputs when I2C_RSEL =
1.
RSEL = 0: Select REF_A inputs.
RSEL = 1: Select REF_B inputs.
If PIN6_OVRD = 1 (register 02h), then reference selection must be controlled by programming RSEL, regardless
of I2C_RSEL. When PIN6_OVRD = 0 and I2C_RSEL = 0, then reference selection is controlled using the
REF_SEL input pin and the RSEL bit is ignored.
Bit 5: Reference Select Control via I2C (I2C_RSEL)
By programming I2C_RSEL, reference selection can be controlled either via I2C or the REF_SEL input pin.
I2C_RSEL = 1: Control reference selection by programming RSEL.
I2C_RSEL = 0: Control reference selection via the REF_SEL input pin.
NOTE
If PIN6_OVRD = 1, then reference selection must be controlled by programming RSEL
regardless of I2C_RSEL.
Bit 6: Mode Select (GNLK)
The GNLK bit selects the operating mode when I2C_GNLK = 1. See section MODES OF OPERATION.
GNLK = 0: Selects Free Run mode.
GNLK = 1: Selects Genlock mode.
If I2C_GNLK = 0, then the operating mode will be controlled using the GENLOCK input pin and the GNLK bit will
be ignored.
Bit 7: Mode Select via I2C (I2C_GNLK)
By programming I2C_GNLK, mode selection can be controlled either via I2C or the GENLOCK input pin.
I2C_GNLK = 1: Control mode selection by programming GNLK.
I2C_GNLK = 0: Control mode selection via the GENLOCK input pin.
Genlock Status And Lock Control Register
Register 01h
Bit 0: Reference Status (REF_VALID)
REF_VALID is a read-only bit and indicates the presence or loss of reference on the selected reference port in
Genlock mode. The NO_REF output flag is an inverted copy of REF_VALID. See section Reference Detection.
REF_VALID = 0: Indicates loss of reference (LOR).
REF_VALID = 1: Indicates valid reference.
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