LMH1982SQ-NOPB Datasheet, PDF (18/43 Pages) Texas Instruments – Multi-Rate Video Clock Generator with Genlock

LMH1982
SNLS289C – APRIL 2008 – REVISED MARCH 2013
TOF Generation Blocks
TOF_HIZ POL_TOF
08h[5]
0Ah[6]
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TOF
output
TOF Output Enable
and
Polarity Select
SD_CLK
HD_CLK
TOF_CLK
0Ch[5]
SEL
0 _{2:1 MUX}
TOF Clock Select
1
TOF/CLK Alignment Blocks
FB_DIV
04h-05h
TOF_PPL
0Bh-0Ch
TOF_LPFM
0Dh-0Eh
REF CLK
COUNTER 5
Output Format
Pixels per Line
COUNTER 6
Output Format
Lines per Frame
RST4
RST4
RST4
(to PLLs 2, 3, 4)
REF_LPFM
0Fh-10h
TOF_RST
09h-0Ah
RST4 (Output
Alignment Signal)
VCXO
input
(pin 29)
PLL 1 Feedback
Divider
H_FB
COUNTER 3
Reference Format
Lines per Frame
RST3
COUNTER 4
TOF Reset
RST3
TOF_RST
09h-0Ah
TOF_OFFSET
11h-12h
EN_TOF_RST
0Ah[7]
Selected
VREF
input
Reference
Frame Decoder
COUNTER 1
TOF Reset and
Initialization
TOF_INIT
0Ah[5]
REF_SEL input
(pin 6)
0
2:1 MUX
Init Signal Select
1
SEL
RST1
PIN 6_OVRD
02h[5]
RST2
COUNTER 2
TOF Offset
H_FB
(from PLL 1 Feedback
Divider block)
Figure 9. Functional Block Diagram – TOF Generation and Output Initialization Circuitry
18
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