CC2510_15 Datasheet, PDF (77/245 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory,2.4 GHz RF Transceiver, and USB Controller

CC2511F8 - Not Recommended for New Designs
CC2510Fx / CC2511Fx
12.1.5.1 High Speed Oscillators
Two high speed oscillators are present in the
device:
• High speed crystal oscillator (24 - 27
MHz for CC2510Fx and 48 MHz for
CC2511Fx)
• High speed RC oscillator (12 - 13.5 MHz
for CC2510Fx and 12 MHz for CC2511Fx)
The high speed crystal oscillator startup time
may be too long for some applications, and the
device can therefore run on the high speed
RCOSC until the crystal oscillator is stable.
The HS RCOSC consumes less power than
the crystal oscillator, but since it is not as
accurate as the crystal oscillator it can not be
used for RF transceiver operation.
The CLKCON.OSC bit selects the source of the
system clock (high speed crystal oscillator or
high speed RC oscillator). The system clock
will not change clock source before the
selected clock source is stable (indicated by
SLEEP.XOSC_STB and SLEEP.HFRC_STB). It
should be noted that once the clock source
change has been initiated the clock source
should not be changed or updated again until
the clock source change has taken place.
Note: When changing system clock source
from HS XOSC to HS RCOSC, there might
be a delay from the assertion of
SLEEP.HFRC_STB until the actual change
of the system clock source (assertion of
CLKCON.OSC). This delay is present if the
HS RCOSC and/or low power RCOSC is
being calibrated when the system clock
source change is being initiated.
The oscillator not selected as the system clock
source will be set in power-down mode by
setting SLEEP.OSC_PD to 1 (the default state).
SLEEP.OSC_PD should not be set to 1 before
the oscillator selected as the system clock
source
is
reported
stable
(SLEEP.HFRC_STB=1
or
SLEEP.XOSC_STB=1). Please note the
minimum requirement on high speed crystal
oscillator power down guard time in all modes
of operation for CC2510Fx, see Table 11. The
HS RCOSC may be turned off when the high
speed crystal oscillator has been selected as
system clock source and vice versa.
When SLEEP.OSC_PD is 0, both oscillators
are powered up and running. Be aware that
SLEEP.OSC_PD is cleared if the CLKCON.OSC
bit is toggled.
A calibration of the HS RCOSC will be initiated
by selecting the HS XOSC as system clock
source (CLKCON.OSC is set to 0). The
calibration will only be performed once. It is
not possible to enter PM{1 - 3}, change system
clock source back to HS RCOSC, or power
down the HS RCOSC before the calibration is
completed. Note that even if the calibration of
the HS RCOSC is completed, a calibration of
the low power RC oscillator might still be in
progress and changing system clock source
back to HS RCOSC will not be possible before
also this calibration has completed.
If SLEEP.OSC_PD=0, the HS RCOSC will run
on the calibrated value once the calibration is
completed (see Table 15 for calibration time).
If SLEEP.OSC_PD=1, the HS RCOSC will be
turned off after calibration, but the calibration
value will be stored and used when the HS
RCOSC is started again. In order to calibrate
the HS RCOSC regularly (if so found
necessary based on the drift parameters listed
in Table 15) one should switch between using
the HS RCOSC and the high speed crystal
oscillator as system clock source.
If CLKCON.OSC is set to 0 when entering
PM{1 - 3}, the HS RCOSC will be calibrated
once when returning to active mode (the
calibration will start once the HS XOSC is
stable and act as the clock source for the
system clock).
Note: HS RCOSC calibration value gets
reset to its default value upon waking up
from PM{2 - 3}, meaning that any previous
calibration result is lost.
12.1.5.2 System Clock Speed and Radio
Operation of the RF transceiver requires that
the high speed crystal oscillator is used. The
CLKCON.CLKSPD setting will limit the
maximum data rate, as shown in Table 49.
Note
that
when
using
FEC
(MDMCFG1.FEC_EN=1)
CLKCON.CLKSPD
must be set to 000.
SWRS055G
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