CC2510_15 Datasheet, PDF (48/245 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory,2.4 GHz RF Transceiver, and USB Controller

CC2511F8 - Not Recommended for New Designs
CC2510Fx / CC2511Fx
XDATA
Address
0xDF16
0xDF17
0xDF18
0xDF19
0xDF1A
0xDF1B
0xDF1C
0xDF1D
0xDF1E
0xDF1F
0xDF20 -
0xDF22
0xDF23
0xDF24
0xDF25
0xDF27 -
0xDF2D
0xDF2E
0xDF2F
0xDF30
0xDF31
0xDF36
0xDF37
0xDF38
0xDF39
0xDF3A
0xDF3B
0xDF3C
0xDF3D
Register
Description
BSCFG
AGCCTRL2
AGCCTRL1
AGCCTRL0
FREND1
FREND0
FSCAL3
FSCAL2
FSCAL1
FSCAL0
Bit Synchronization configuration
AGC control
AGC control
AGC control
Front end RX configuration
Front end TX configuration
Frequency synthesizer calibration
Frequency synthesizer calibration
Frequency synthesizer calibration
Frequency synthesizer calibration
Reserved
TEST2
TEST1
TEST0
Various Test Settings
Various Test Settings
Various Test Settings
Reserved
PA_TABLE0 PA output power setting
IOCFG2
Radio test signal configuration (P1_7)
IOCFG1
Radio test signal configuration (P1_6)
IOCFG0
Radio test signal configuration (P1_5)
PARTNUM
Chip ID[15:8]
VERSION
Chip ID[7:0]
FREQEST
Frequency Offset Estimate
LQI
Link Quality Indicator
RSSI
Received Signal Strength Indication
MARCSTATE Main Radio Control State
PKTSTATUS Packet status
VCO_VC_DAC PLL calibration current
Retention⁷
Y
Y
Y
Y
Y
Y
N
N
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
NA
NA
NA
NA
NA
NA
NA
NA
Table 32: Overview of RF Registers
10.2.3.5 I²S Registers
The I²S registers are all related to I²S
configuration and control. The I²S registers can
only be accessed through XDATA memory
space and reside in address range 0xDF40 -
0xDF48. Table 33 gives a descriptive overview
of these registers. Each register is described in
detail in Section 12.15.13, starting on Page
163.
SWRS055G
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