CC2510_15 Datasheet, PDF (175/245 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory,2.4 GHz RF Transceiver, and USB Controller

CC2511F8 - Not Recommended for New Designs
12.16.8 USB Reset
When reset signaling is detected on the bus,
the USBCIF.RSTIF flag will be asserted. If
USBCIE.RSTIE is enabled, IRCON2.USBIF
will also be asserted and an interrupt request
is generated if IEN2.USBIE=1. The firmware
should take appropriate action when a USB
reset occurs. A USB reset should place the
device in the Default state where it will only
respond to address 0 (the default address).
One or more resets will normally take place
during the enumeration phase right after the
USB cable is connected.
The following actions are performed by the
USB controller when a USB reset occurs:
• USBADDR is set to 0
• USBINDEX is set to 0
• All endpoint FIFOs are flushed
• USBCS0,
USBCSIL,
USBCSIH,
USBCSOL, USBCSOH are cleared.
• All interrupts, except SOF and suspend,
are enabled
• An interrupt request is generated (if
IEN2.USBIE=1
and
USBCIE.RSTIE=1)
Firmware should close all pipes and wait for a
new enumeration phase when USB reset is
detected.
12.16.9 Suspend and Resume
The USB controller will assert
USBCIF.SUSPENDIF and enter suspend
mode when the USB bus has been
continuously idle for 3 ms, provided that
USBPOW.SUSPEND_EN=1. IRCON2.USBIF will
be asserted if USBCIE.SUSPENDIE is
enabled, and an interrupt request is generated
if IEN2.USBIE=1.
While in suspend mode, only limited current
can be sourced from the USB bus. See the
USB 2.0 Specification [5] for details about this.
To be able to meet the suspend-current
requirement, the CC2511Fx should be taken
down to PM1 when suspend is detected. The
CC2511Fx should not enter PM2 or PM3 since
this will reset the USB controller.
Any valid non-idle signaling on the USB bus
will cause the USBCIF.RESUMEIF to be
asserted and an interrupt request to be
generated and wake up the system if the USB
resume interrupt is configured correctly. Refer
CC2510Fx / CC2511Fx
to 12.16.3.1 for details about how to set up the
USB resume interrupt.
Any valid non-idle signaling on the USB bus
will cause the USBCIF.RESUMEIF to be
asserted and an interrupt request to be
generated and wake up the system if the USB
resume interrupt is configured correctly. Refer
to 12.16.3.1 for details about how to set up the
USB resume interrupt.
When the system wakes up (enters active
mode) from suspend, no USB registers must
be accessed before the 48 MHZ crystal
oscillator has stabilized.
A USB reset will also wake up the system from
suspend. A USB resume interrupt request will
be generated, if the interrupt is configured as
described in 12.16.3.1, but the
USBCIF.RSTIF interrupt flag will be set
instead of the USBCIF.RESUMEIF interrupt
flag.
12.16.10 Remote Wakeup
The USB controller can resume from suspend
by signaling resume to the USB hub. Resume
is performed by setting USBPOW.RESUME to 1
for approximately 10 ms. According to the USB
2.0 Specification [5], the resume signaling
must be present for at least 1 ms and no more
than 15 ms. It is, however, recommended to
keep the resume signaling for approximately
10 ms. Notice that support for remote wakeup
must be declared in the USB descriptor, and
that the USB host must grant the device the
privilege to perform remote wakeup (through a
SET_FEATURE request).
12.16.11 USB Registers
This section describes all USB registers used
for control and status for the USB. The USB
registers reside in XDATA memory space in
the region 0xDE00 - 0xDE3F. These registers
can be divided into three groups: The Common
USB Registers, the Indexed Endpoint
Registers, and the Endpoint FIFO Registers.
Table 34, Table 35, and Table 36 give an
overview of the registers in the three groups
respectively, while the remaining of this section
will describe each register in detail. The
Indexed Endpoint Registers represent the
currently selected endpoint. The USBINDEX
register is used to select the endpoint.
Notice that the upper register addresses
0xDE2C – 0xDE3F are reserved.
SWRS055G
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