CC2510_15 Datasheet, PDF (140/245 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory,2.4 GHz RF Transceiver, and USB Controller

CC2511F8 - Not Recommended for New Designs
CC2510Fx / CC2511Fx
ADCL (0xBA) - ADC Data Low
Bit Field Name Reset R/W
7:4 ADC[3:0]
0000 R
3:0
0000 R
Description
Least significant part of ADC conversion result. The decimation rate configures
through ADCCON2.SDIV determines how many of these bits are relevant to use.
ADCH (0xBB) - ADC Data High
Bit Field Name Reset R/W
7:0 ADC[11:4] 0x00 R
Description
Most significant part of ADC conversion result. The decimation rate configures
through ADCCON2.SDIV determines how many of these bits are relevant to use.
ADCCON1 (0xB4) - ADC Control 1
Bit Field Name Reset R/W
7
EOC
0
R
H0
Description
End of conversion. Cleared when ADCH has been read. If a new conversion is
completed before the previous data has been read, the EOC bit will remain high.
6
ST
0
5:4 STSEL[1:0] 11
3:2 RCTRL[1:0] 00
1:0
11
R/W1
R/W
R/W
R/W
0 Conversion not complete
1 Conversion completed
Start conversion. Read as 1 until conversion has completed
0 No conversion in progress
1 Start a conversion sequence if ADCCON1.STSEL=11 and no sequence is
running.
Start select. Selects which event that will start a new conversion sequence.
00 External trigger on P2_0 pin.
01 Full speed. Do not wait for triggers.
10 Timer 1 channel 0 compare event
11 ADCCON1.ST=1
Controls the 16 bit random generator. When set to 01, the setting will
automatically return to 00 when operation has completed.
00 Operation completed
01 Clock the LFSR once (13x unrolling)
10 Reserved
11 Reserved
Reserved. Always write 11
SWRS055G
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