CC2510_15 Datasheet, PDF (62/245 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory,2.4 GHz RF Transceiver, and USB Controller

CC2511F8 - Not Recommended for New Designs
module flag. When any module flag is cleared
the chip will check if there are any module
interrupt flags left that are both enabled and
asserted, if so the CPU interrupt flag will be
asserted and a new interrupt triggered.
CC2510Fx / CC2511Fx
The following code example shows how only
one module flag is handled and cleared each
time the interrupt occurs:
#pragma vector = RF_VECTOR
__interrupt void rf_interrupt (void)
{
S1CON &= ~0x03;
// Clear CPU interrupt flag
if(RFIF & 0x80)
// TX underflow
{
irq_txunf();
// Handle TX underflow
RFIF &= ~0x80;
// Clear module interrupt flag
}
else if(RFIF & 0x40) // RX overflow
{
irq_rxovf();
// Handle RX overflow
RFIF &= ~0x40;
// Clear module interrupt flag
}
// Use ”else if” to check and handle other RFIF flags
}
TCON (0x88) - CPU Interrupt Flag 1
Bit Field Name
Reset R/W Description
7 _{URX1IF /} 0
I2SRXIF
R/W USART1 RX interrupt flag / I²S RX interrupt flag
H0
Set to 1 when USART1 RX interrupt occurs and cleared when CPU vectors to
the interrupt service routine.
0 Interrupt not pending
1 Interrupt pending
6
0
R/W Not used
5 _ADCIF
4
0
R/W ADC interrupt flag. Set to 1 when ADC interrupt occurs and cleared when CPU
H0 vectors to the interrupt service routine.
0 Interrupt not pending
1 Interrupt pending
0
R/W Not used
3 _URX0IF
0
2
1
1 _RFTXRXIF 0
0
1
R/W USART0 RX interrupt flag. Set to 1 when USART0 interrupt occurs and cleared
H0 when CPU vectors to the interrupt service routine.
0 Interrupt not pending
1 Interrupt pending
R/W Reserved. Must always be set to 1.
R/W RF TX/RX complete interrupt flag. Set to 1 when RFTXRX interrupt occurs and
H0 cleared when CPU vectors to the interrupt service routine.
0 Interrupt not pending
1 Interrupt pending
R/W Reserved. Must always be set to 1.
SWRS055G
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