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CC2510_15 Datasheet, PDF (188/245 Pages) Texas Instruments – Low-Power SoC (System-on-Chip) with MCU, Memory,2.4 GHz RF Transceiver, and USB Controller
CC2511F8 - Not Recommended for New Designs
A simple example of transmitting data is shown
CC2510Fx / CC2511Fx
in Figure 49. This example does not use DMA.
; Transmit the following data: 0x02, 0x12, 0x34
; (Assume that the radio has already been configured, the high speed
; crystal oscillator is selected as system clock, and CLKCON.CLKSPD=000)
MOV RFST,#03H
C1: JNB RFTXRXIF,C1
CLR RFTXRXIF
MOV RFD,#02H
C2: JNB RFTXRXIF,C2
CLR RFTXRXIF
MOV RFD,#12H
C3: JNB RFTXRXIF,C3
CLR RFTXRXIF
MOV RFD,#34H
; Start TX with STX command strobe
; Wait for interrupt flag telling radio is
; ready to accept data, then write first
; data byte to radio (packet length = 2)
; Wait for radio
;
; Send first byte in payload
; Wait for radio
;
; Send second byte in payload
; Done
Figure 49: Simple RF Transmit Example
13.5 Data Rate Programming
The data rate used when transmitting, or the
data rate expected in receive is programmed
by the MDMCFG3.DRATE_M and the
MDMCFG4.DRATE_E configuration registers.
The data rate is given by the formula below.
( ) RDATA =
256 + DRATE _ M
228
⋅ 2DRATE _ E ⋅ fref
The following approach can be used to find
suitable values for a given data rate:
DRATE
_
E
=

log

2


RDATA ⋅
f ref
220

DRATE _ M
=
RDATA ⋅ 228
fref ⋅ 2DRATE _ E
− 256
If DRATE_M is rounded to the nearest integer
and becomes 256, increment DRATE_E and
use DRATE_M=0.
Note that the maximum data rate will be limited
by the system clock speed. Please see
12.1.5.2 for more details.
13.6 Receiver Channel Filter Bandwidth
In order to meet different channel width
requirements, the receiver channel filter is
programmable. The MDMCFG4.CHANBW_E and
MDMCFG4.CHANBW_M configuration registers
control the receiver channel filter bandwidth.
The following formula gives the relation
between the register settings and the channel
filter bandwidth:
BWchannel
=
f ref
8 ⋅ (4 + CHANBW _
M )·2CHANBW_ E
For best performance, the channel filter
bandwidth should be selected so that the
signal bandwidth occupies at most 80% of the
channel filter bandwidth. The channel centre
tolerance due to crystal accuracy should also
be subtracted from the signal bandwidth. The
following example illustrates this:
With the channel filter bandwidth set to 600
kHz, the signal should stay within 80% of 600
kHz, which is 480 kHz. Assuming 2.44 GHz
frequency and ±20 ppm frequency uncertainty
for both the transmitting device and the
receiving device, the total frequency
uncertainty is ±40 ppm of 2.44 GHz, which is
±98 kHz. If the whole transmitted signal
bandwidth is to be received within 480 kHz, the
transmitted signal bandwidth should be
maximum 480 kHz - 2·98 kHz, which is 284
kHz.
The CC2510Fx/CC2511Fx supports channel filter
bandwidths shown in Table 62 and Table 63
respectively.
SWRS055G
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