TLK3118 Datasheet, PDF (53/57 Pages) Texas Instruments – Redundant XAUI Transceiver

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HSTL OUTPUT SWITCHING CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
t_su
Setup time, RXD[31:0], RXC[3:0] See Figure 33.
setup prior to RCLK transition high
or low
t_h
Hold time, RXD[31:0], RXC[3:0] hold See Figure 33.
after RCLK transition high or low
DC
Duty cycle, RCLK
TLK3118
Redundant XAUI Transceiver
SLLS628A – DECEMBER 2004 – REVISED APRIL 2005
MIN
960
960
45%
TYP
MAX UNIT
ps
ps
55%
RCLK
RXD[31:0]
RXC[3:0]
t_su
t_h
t_h
t_su
Figure 33. HSTL Output Timing Diagram
V_OH(ac)
V_OL(ac)
V_OH(ac)
V_OL(ac)
HSTL INPUT TIMING REQUIREMENTS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
t_su
Setup time, TXD [31:0], TXC[3:0] See Figure 34.
setup prior to TCLK transition high
or low
t_h
Hold time, TXD[31:0], TXC[3:0] hold See Figure 34.
after TCLK transition high or low
DC
Duty cycle, TCLK
MIN
TYP
480
480
45%
TCLK
TXD[31:0]
TXC[3:0]
t_su
t_h
t_su
Figure 34. HSTL Data Input Timing Diagram
V_IH(ac)
V_REF
V_IL(ac)
t_h
V_IH(ac)
V_REF
V_IL(ac)
MAX
UNIT
ps
ps
55%
MDIO TIMING REQUIREMENTS
over operating free-air temperature range (unless otherwise noted)
t_period
t_su
t_h
PARAMETER
MDC period
MDIO setup to ↑ MDC
MDIO hold to ↑ MDC
TEST CONDITIONS
See Figure 35.
See Figure 35.
See Figure 35.
MIN
TYP
MAX UNIT
500
ns
10
ns
10
ns
53