TLK3118 Datasheet, PDF (26/57 Pages) Texas Instruments – Redundant XAUI Transceiver

TLK3118
Redundant XAUI Transceiver
SLLS628A – DECEMBER 2004 – REVISED APRIL 2005
Table 13. XS_STATUS_2 (continued)
Bit(s)
4/5.8.11
4/5.8.10
Address:0x0008
Name
Description
Transmit fault
1 = Fault condition on transmit path
0 = No fault condition on transmit path
Receive fault
1 = Fault condition on receive path
0 = No fault condition on receive path
Default:0x8C00
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Access
RO/LH
Bit(s)
4/5.14.15:0
OUI c:r
Table 14. XS_PACKAGE_IDENTIFIER_1
Address:0x000E
Name
Description
Organizationally unique identifier.
Default:0x4000
Access
RO
Bit(s)
4/5.15.15:0
OUI c:r
Table 15. XS_PACKAGE_IDENTIFIER_2
Address:0x000F
Default:0x50B0
Name
Description
Organizationally unique identifier Manufacturer model and revision number.
Access
RO
Bit(s)
4/5.24.12
4/5.24.11
4/5.24.10
4/5.24.3
4/5.24.2
4/5.24.1
4/5.24.0
Table 16. XS_LANE_STATUS
Address:0x0018
Default:0x0C00
Name
Description
Align status
When 1, indicates all lanes are aligned
Pattern testing ability
Always reads 1. Able to generate test patterns
Loopback ability
Always read 1. Has the ability to perform loopback function
Lane 3 sync
1 = Lane 3 is synchronized
0 = Lane 3 is not synchronized
Lane 2 sync
1 = Lane 2 is synchronized
0 = Lane 2 is not synchronized
Lane 1 sync
1 = Lane 1 is synchronized
0 = Lane 1 is not synchronized
Lane 0 sync
1 = Lane 0 is synchronized
0 = Lane 0 is not synchronized
Access
RO
Bit(s)
4/5.25.2
4/5.25.1:0
Table 17. XS_TEST_CONTROL
Address:0x0019
Name
Description
Receive test-pattern enable When 1, indicates test pattern function is enabled.
Test-pattern select
00 = High frequency test pattern
01 = Low frequency test pattern
10 = Mixed frequency test pattern
11 = Reserved
Default:0x0000
Access
RW
Bit(s)
4/5.32768.1
4/5.32768.0
Table 18. TEST_CONFIG
Address:0x8000
Default:0x0000
Name
Description
CRPAT enable
When set, enables the CRPAT test pattern on all 4 lanes.
CJPAT enable
When set, enables the CJPAT test pattern on all 4 lanes.
Access
RW
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