TLK3118 Datasheet, PDF (22/57 Pages) Texas Instruments – Redundant XAUI Transceiver

TLK3118
Redundant XAUI Transceiver
SLLS628A – DECEMBER 2004 – REVISED APRIL 2005
V_DDQ
50 Ω
50 Ω
VTP
Macro
50 Ω
50 Ω
Transmission Line
V_DDQ
RΩ
HSTL
RΩ
PCB
GND
Figure 21. XGMII Bus Buffers
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V_DDQ
100 Ω
+
100 Ω
_
V_ref
HSTL Input
Link Test Functions
The TLK3118 has an extensive suite of built in test functions to support system diagnostic requirements. Each
channel has built-in link test generator and verification logic. Several patterns can be selected via the MDIO that
offer extensive test coverage. The patterns are: 2⁷-1 or 2²³-1 PRBS (Pseudo Random Binary Sequence), CJPAT,
CRPAT, high and low and mixed frequency patterns.
MDIO Management Interface
The TLK3118 supports the Management Data Input/Output (MDIO) Interface as defined in Clauses 45 of the
IEEE 802.3ae Ethernet specification. The MDIO allows register-based management and control of the serial
links. Normal operation of the TLK3118 is possible without use of this interface since all of the essential signals
necessary for operations are accessible via the device pins. However, some additional features are accessible
only through the MDIO.
The MDIO Management Interface consists of a bi-directional data path (MDIO) and a clock reference (MDC). The
device address is defined by the external inputs DVAD (4:1). DVAD (0) indicates whether the device is
responding as a DTE (4.xxx) (DVAD (0) = 1) or PHY (5.xxx) (DVAD (0) = 0). Note that each register is accessed
as either DTE or PHY devices in the TLK3118; although physically there is only one register accessed two
different ways. Also note, the XAUI interfaces must both be DTE devices or both be PHY devices. An even PHY
Address (as shown below) indicates an access to XAUI A register space, and an odd PHY Address indicates
access to XAUI B register space.
Write transactions which address an invalid register or device or a read only register will be ignored. Read
transactions which address an invalid register or device will return a 0.
NOTE:
Registers from address 32900 and above can be accessed from A side or B side.
These registers are implemented from the top level and can control the entire device
(XAUI-A & XAUI-B).
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